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Searched refs:Idx1 (Results 1 – 6 of 6) sorted by relevance

/external/llvm/lib/CodeGen/
DTargetInstrInfo.cpp125 unsigned Idx1, Idx2; in commuteInstruction() local
126 if (!findCommutedOpIndices(MI, Idx1, Idx2)) { in commuteInstruction()
133 assert(MI->getOperand(Idx1).isReg() && MI->getOperand(Idx2).isReg() && in commuteInstruction()
136 unsigned Reg1 = MI->getOperand(Idx1).getReg(); in commuteInstruction()
139 unsigned SubReg1 = MI->getOperand(Idx1).getSubReg(); in commuteInstruction()
141 bool Reg1IsKill = MI->getOperand(Idx1).isKill(); in commuteInstruction()
146 MI->getDesc().getOperandConstraint(Idx1, MCOI::TIED_TO) == 0) { in commuteInstruction()
168 MI->getOperand(Idx1).setReg(Reg2); in commuteInstruction()
170 MI->getOperand(Idx1).setSubReg(SubReg2); in commuteInstruction()
172 MI->getOperand(Idx1).setIsKill(Reg2IsKill); in commuteInstruction()
DShadowStackGC.cpp68 int Idx1, const char *Name);
71 int Idx1, int Idx2, const char *Name);
/external/llvm/include/llvm/IR/
DIRBuilder.h941 Value *CreateConstGEP2_32(Value *Ptr, unsigned Idx0, unsigned Idx1,
945 ConstantInt::get(Type::getInt32Ty(Context), Idx1)
953 Value *CreateConstInBoundsGEP2_32(Value *Ptr, unsigned Idx0, unsigned Idx1,
957 ConstantInt::get(Type::getInt32Ty(Context), Idx1)
982 Value *CreateConstGEP2_64(Value *Ptr, uint64_t Idx0, uint64_t Idx1,
986 ConstantInt::get(Type::getInt64Ty(Context), Idx1)
994 Value *CreateConstInBoundsGEP2_64(Value *Ptr, uint64_t Idx0, uint64_t Idx1,
998 ConstantInt::get(Type::getInt64Ty(Context), Idx1)
/external/llvm/utils/TableGen/
DCodeGenRegisters.cpp1159 CodeGenSubRegIndex *Idx1 = i1->first; in computeComposites() local
1178 if (CodeGenSubRegIndex *Prev = Idx1->addComposite(Idx2, Idx3)) in computeComposites()
1179 PrintWarning(Twine("SubRegIndex ") + Idx1->getQualifiedName() + in computeComposites()
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp5901 int Idx1 = (TwoInputs && (EltIdx >= 16)) ? 0x80 : EltIdx+1; in LowerVECTOR_SHUFFLEv8i16() local
5903 pshufbMask.push_back(DAG.getConstant(Idx1, MVT::i8)); in LowerVECTOR_SHUFFLEv8i16()
5918 int Idx1 = (EltIdx < 16) ? 0x80 : EltIdx - 15; in LowerVECTOR_SHUFFLEv8i16() local
5920 pshufbMask.push_back(DAG.getConstant(Idx1, MVT::i8)); in LowerVECTOR_SHUFFLEv8i16()
/external/llvm/lib/CodeGen/SelectionDAG/
DDAGCombiner.cpp2409 int Idx1 = SVN1->getMaskElt(i); in SimplifyBinOpWithSameOpcodeHands() local
2410 if (Idx0 != Idx1) { in SimplifyBinOpWithSameOpcodeHands()