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Searched refs:ImmS (Results 1 – 6 of 6) sorted by relevance

/external/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.cpp718 uint32_t ImmS = Num1s - 1; in isLogicalImm() local
722 case 16: ImmS |= 0x20; break; // 10ssss in isLogicalImm()
723 case 8: ImmS |= 0x30; break; // 110sss in isLogicalImm()
724 case 4: ImmS |= 0x38; break; // 1110ss in isLogicalImm()
725 case 2: ImmS |= 0x3c; break; // 11110s in isLogicalImm()
728 Bits = ImmS | (ImmR << 6) | (N << 12); in isLogicalImm()
738 uint32_t ImmS = Bits & 0x3f; in isLogicalImmBits() local
747 else if ((ImmS & 0x20) == 0) in isLogicalImmBits()
749 else if ((ImmS & 0x10) == 0) in isLogicalImmBits()
751 else if ((ImmS & 0x08) == 0) in isLogicalImmBits()
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/external/llvm/lib/Target/AArch64/Disassembler/
DAArch64Disassembler.cpp459 unsigned ImmS = fieldFromInstruction(Insn, 10, 6); in DecodeBitfieldInstruction() local
470 if (ImmR > 31 || ImmS > 31) in DecodeBitfieldInstruction()
487 assert(!(ImmS == 31 && !SF && Opc != BFM) in DecodeBitfieldInstruction()
489 assert(!(ImmS == 63 && SF && Opc != BFM) in DecodeBitfieldInstruction()
494 assert((ImmS != 7 && ImmS != 15) && "extension got here"); in DecodeBitfieldInstruction()
495 assert((ImmS != 31 || SF == 0) && "extension got here"); in DecodeBitfieldInstruction()
497 assert((SF != 0 || (ImmS != 7 && ImmS != 15)) && "extension got here"); in DecodeBitfieldInstruction()
503 if (SF && (ImmS + 1) % 64 == ImmR) { in DecodeBitfieldInstruction()
505 Inst.addOperand(MCOperand::CreateImm(63 - ImmS)); in DecodeBitfieldInstruction()
507 } else if (!SF && (ImmS + 1) % 32 == ImmR) { in DecodeBitfieldInstruction()
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/external/llvm/lib/Target/AArch64/InstPrinter/
DAArch64InstPrinter.cpp146 unsigned ImmS = ImmSOp.getImm(); in printBFXWidthOperand() local
148 assert(ImmS >= ImmR && "Invalid ImmR, ImmS combination for bitfield extract"); in printBFXWidthOperand()
150 O << '#' << (ImmS - ImmR + 1); in printBFXWidthOperand()
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td99 // (A64[SU]BFX Field, ImmR, ImmS).
101 // Note that ImmR and ImmS are already encoded for the actual instructions. The
102 // more natural LSB and Width mix together to form ImmR and ImmS, something
1009 (ins GPR32:$Rn, bitfield32_imm:$ImmR, bitfield32_imm:$ImmS),
1010 !strconcat(asmop, "\t$Rd, $Rn, $ImmR, $ImmS"),
1016 (ins GPR64:$Rn, bitfield64_imm:$ImmR, bitfield64_imm:$ImmS),
1017 !strconcat(asmop, "\t$Rd, $Rn, $ImmR, $ImmS"),
1030 (ins GPR32:$src, GPR32:$Rn, bitfield32_imm:$ImmR, bitfield32_imm:$ImmS),
1031 "bfm\t$Rd, $Rn, $ImmR, $ImmS", [], NoItinerary> {
1038 (ins GPR64:$src, GPR64:$Rn, bitfield64_imm:$ImmR, bitfield64_imm:$ImmS),
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DAArch64InstrFormats.td204 bits<6> ImmS;
211 let Inst{15-10} = ImmS;
820 bits<6> ImmS;
822 // N, ImmR and ImmS have no separate existence in any assembly syntax (or for
827 // ImmS = Imm{5-0};
/external/llvm/lib/Target/AArch64/AsmParser/
DAArch64AsmParser.cpp1740 int64_t ImmS = Inst.getOperand(ImmOps+1).getImm(); in validateInstruction() local
1742 if (ImmR != 0 && ImmS >= ImmR) { in validateInstruction()
1756 int64_t ImmS = Inst.getOperand(ImmOps+1).getImm(); in validateInstruction() local
1767 if (ImmS >= RegWidth || ImmS < ImmR) { in validateInstruction()