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Searched refs:MCSchedClassDesc (Results 1 – 8 of 8) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DTargetSchedule.h55 const MCSchedClassDesc *resolveSchedClass(const MachineInstr *MI) const;
92 const MCSchedClassDesc *SC = 0) const;
108 ProcResIter getWriteProcResBegin(const MCSchedClassDesc *SC) const { in getWriteProcResBegin()
112 ProcResIter getWriteProcResEnd(const MCSchedClassDesc *SC) const { in getWriteProcResEnd()
DScheduleDAGInstrs.h153 const MCSchedClassDesc *getSchedClass(SUnit *SU) const { in getSchedClass()
DScheduleDAG.h33 struct MCSchedClassDesc;
279 const MCSchedClassDesc *SchedClass; // NULL or resolved SchedClass.
/external/llvm/include/llvm/MC/
DMCSubtargetInfo.h94 const MCSchedClassDesc *SC) const { in getWriteProcResBegin()
98 const MCSchedClassDesc *SC) const { in getWriteProcResEnd()
102 const MCWriteLatencyEntry *getWriteLatencyEntry(const MCSchedClassDesc *SC, in getWriteLatencyEntry()
110 int getReadAdvanceCycles(const MCSchedClassDesc *SC, unsigned UseIdx, in getReadAdvanceCycles()
DMCSchedule.h93 struct MCSchedClassDesc { struct
193 const MCSchedClassDesc *SchedClassTable;
221 const MCSchedClassDesc *sc, unsigned npr, unsigned nsc, in MCSchedModel()
244 const MCSchedClassDesc *getSchedClassDesc(unsigned SchedClassIdx) const { in getSchedClassDesc()
/external/llvm/lib/CodeGen/
DTargetSchedule.cpp78 const MCSchedClassDesc *SC) const { in getNumMicroOps()
125 const MCSchedClassDesc *TargetSchedModel::
130 const MCSchedClassDesc *SCDesc = SchedModel.getSchedClassDesc(SchedClass); in resolveSchedClass()
213 const MCSchedClassDesc *SCDesc = resolveSchedClass(DefMI); in computeOperandLatency()
225 const MCSchedClassDesc *UseDesc = resolveSchedClass(UseMI); in computeOperandLatency()
256 const MCSchedClassDesc *SCDesc = resolveSchedClass(MI); in computeInstrLatency()
299 const MCSchedClassDesc *SCDesc = resolveSchedClass(DefMI); in computeOutputLatency()
DMachineScheduler.cpp1208 const MCSchedClassDesc *SC = DAG->getSchedClass(&*I); in init()
1447 const MCSchedClassDesc *SC = DAG->getSchedClass(SU); in bumpNode()
1653 const MCSchedClassDesc *SC = DAG->getSchedClass(SU); in initResourceDelta()
/external/llvm/utils/TableGen/
DSubtargetEmitter.cpp38 std::vector<std::vector<MCSchedClassDesc> > ProcSchedClasses;
837 std::vector<MCSchedClassDesc> &SCTab = SchedTables.ProcSchedClasses.back(); in GenSchedClassTables()
843 MCSchedClassDesc &SCDesc = SCTab.back(); in GenSchedClassTables()
854 SCDesc.NumMicroOps = MCSchedClassDesc::VariantNumMicroOps; in GenSchedClassTables()
937 SCDesc.NumMicroOps = MCSchedClassDesc::InvalidNumMicroOps; in GenSchedClassTables()
987 SCDesc.NumMicroOps = MCSchedClassDesc::InvalidNumMicroOps; in GenSchedClassTables()
1009 if (SCDesc.NumMicroOps == MCSchedClassDesc::InvalidNumMicroOps) { in GenSchedClassTables()
1130 std::vector<MCSchedClassDesc> &SCTab = in EmitSchedClassTables()
1143 << MCSchedClassDesc::InvalidNumMicroOps in EmitSchedClassTables()
1147 MCSchedClassDesc &MCDesc = SCTab[SCIdx]; in EmitSchedClassTables()