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Searched refs:MIPS_DSP_ACC (Results 1 – 3 of 3) sorted by relevance

/external/qemu/target-mips/
Dmachine.c14 for(i = 0; i < MIPS_DSP_ACC; i++) in save_tc()
16 for(i = 0; i < MIPS_DSP_ACC; i++) in save_tc()
18 for(i = 0; i < MIPS_DSP_ACC; i++) in save_tc()
161 for(i = 0; i < MIPS_DSP_ACC; i++) in load_tc()
163 for(i = 0; i < MIPS_DSP_ACC; i++) in load_tc()
165 for(i = 0; i < MIPS_DSP_ACC; i++) in load_tc()
Dcpu.h137 #define MIPS_DSP_ACC 4 macro
143 target_ulong HI[MIPS_DSP_ACC];
144 target_ulong LO[MIPS_DSP_ACC];
145 target_ulong ACX[MIPS_DSP_ACC];
Dtranslate.c431 static TCGv cpu_HI[MIPS_DSP_ACC], cpu_LO[MIPS_DSP_ACC], cpu_ACX[MIPS_DSP_ACC];
8546 for (i = 0; i < MIPS_DSP_ACC; i++) { in mips_tcg_init()