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Searched refs:SDep (Results 1 – 16 of 16) sorted by relevance

/external/llvm/lib/CodeGen/
DScheduleDAGInstrs.cpp261 SDep Dep; in addPhysRegDataDeps()
263 Dep = SDep(SU, SDep::Artificial); in addPhysRegDataDeps()
265 Dep = SDep(SU, SDep::Data, *Alias); in addPhysRegDataDeps()
294 SDep::Kind Kind = MO.isUse() ? SDep::Anti : SDep::Output; in addPhysRegDeps()
304 (Kind != SDep::Output || !MO.isDead() || in addPhysRegDeps()
306 if (Kind == SDep::Anti) in addPhysRegDeps()
307 DefSU->addPred(SDep(SU, Kind, /*Reg=*/*Alias)); in addPhysRegDeps()
309 SDep Dep(SU, Kind, /*Reg=*/*Alias); in addPhysRegDeps()
387 SDep Dep(SU, SDep::Output, Reg); in addVRegDefDeps()
422 SDep dep(DefSU, SDep::Data, Reg); in addVRegUseDeps()
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DScheduleDAG.cpp65 bool SUnit::addPred(const SDep &D, bool Required) { in addPred()
67 for (SmallVector<SDep, 4>::iterator I = Preds.begin(), E = Preds.end(); in addPred()
78 SDep ForwardD = *I; in addPred()
80 for (SmallVector<SDep, 4>::iterator II = PredSU->Succs.begin(), in addPred()
93 SDep P = D; in addPred()
97 if (D.getKind() == SDep::Data) { in addPred()
133 void SUnit::removePred(const SDep &D) { in removePred()
135 for (SmallVector<SDep, 4>::iterator I = Preds.begin(), E = Preds.end(); in removePred()
139 SDep P = D; in removePred()
142 SmallVectorImpl<SDep>::iterator Succ = std::find(N->Succs.begin(), in removePred()
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DAggressiveAntiDepBreaker.cpp259 static void AntiDepEdges(const SUnit *SU, std::vector<const SDep*>& Edges) { in AntiDepEdges()
263 if ((P->getKind() == SDep::Anti) || (P->getKind() == SDep::Output)) { in AntiDepEdges()
276 const SDep *Next = 0; in CriticalPathStep()
288 (NextDepth == PredTotalLatency && P->getKind() == SDep::Anti)) { in CriticalPathStep()
775 std::vector<const SDep *> Edges; in BreakAntiDependencies()
794 const SDep *Edge = Edges[i]; in BreakAntiDependencies()
797 if ((Edge->getKind() != SDep::Anti) && in BreakAntiDependencies()
798 (Edge->getKind() != SDep::Output)) continue; in BreakAntiDependencies()
841 (P->getKind() != SDep::Anti || P->getReg() != AntiDepReg) : in BreakAntiDependencies()
842 (P->getKind() == SDep::Data && P->getReg() == AntiDepReg)) { in BreakAntiDependencies()
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DCriticalAntiDepBreaker.cpp126 static const SDep *CriticalPathStep(const SUnit *SU) { in CriticalPathStep()
127 const SDep *Next = 0; in CriticalPathStep()
138 (NextDepth == PredTotalLatency && P->getKind() == SDep::Anti)) { in CriticalPathStep()
517 if (const SDep *Edge = CriticalPathStep(CriticalPathSU)) { in BreakAntiDependencies()
521 if (Edge->getKind() == SDep::Anti) { in BreakAntiDependencies()
543 (P->getKind() != SDep::Anti || P->getReg() != AntiDepReg) : in BreakAntiDependencies()
544 (P->getKind() == SDep::Data && P->getReg() == AntiDepReg)) { in BreakAntiDependencies()
DMachineScheduler.cpp326 bool ScheduleDAGMI::addEdge(SUnit *SuccSU, const SDep &PredDep) { in addEdge()
343 void ScheduleDAGMI::releaseSucc(SUnit *SU, SDep *SuccEdge) { in releaseSucc()
377 void ScheduleDAGMI::releasePred(SUnit *SU, SDep *PredEdge) { in releasePred()
809 && DAG->addEdge(SUb, SDep(SUa, SDep::Cluster))) { in clusterNeighboringLoads()
822 DAG->addEdge(SI->getSUnit(), SDep(SUb, SDep::Artificial)); in clusterNeighboringLoads()
898 bool Success = DAG->addEdge(&DAG->ExitSU, SDep(SU, SDep::Cluster)); in apply()
DPostRASchedulerList.cpp174 void ReleaseSucc(SUnit *SU, SDep *SuccEdge);
565 void SchedulePostRATDList::ReleaseSucc(SUnit *SU, SDep *SuccEdge) { in ReleaseSucc()
/external/llvm/lib/CodeGen/SelectionDAG/
DScheduleDAGFast.cpp87 void AddPred(SUnit *SU, const SDep &D) { in AddPred()
93 void RemovePred(SUnit *SU, const SDep &D) { in RemovePred()
98 void ReleasePred(SUnit *SU, SDep *PredEdge);
139 void ScheduleDAGFast::ReleasePred(SUnit *SU, SDep *PredEdge) { in ReleasePred()
280 SDep ChainPred; in CopyAndMoveSuccessors()
281 SmallVector<SDep, 4> ChainSuccs; in CopyAndMoveSuccessors()
282 SmallVector<SDep, 4> LoadPreds; in CopyAndMoveSuccessors()
283 SmallVector<SDep, 4> NodePreds; in CopyAndMoveSuccessors()
284 SmallVector<SDep, 4> NodeSuccs; in CopyAndMoveSuccessors()
309 const SDep &Pred = LoadPreds[i]; in CopyAndMoveSuccessors()
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DScheduleDAGRRList.cpp198 void AddPred(SUnit *SU, const SDep &D) { in AddPred()
206 void RemovePred(SUnit *SU, const SDep &D) { in RemovePred()
217 void ReleasePred(SUnit *SU, const SDep *PredEdge);
224 void CapturePred(SDep *PredEdge);
364 void ScheduleDAGRRList::ReleasePred(SUnit *SU, const SDep *PredEdge) { in ReleasePred()
790 void ScheduleDAGRRList::CapturePred(SDep *PredEdge) { in CapturePred()
1016 SmallVector<SDep, 4> ChainPreds; in CopyAndMoveSuccessors()
1017 SmallVector<SDep, 4> ChainSuccs; in CopyAndMoveSuccessors()
1018 SmallVector<SDep, 4> LoadPreds; in CopyAndMoveSuccessors()
1019 SmallVector<SDep, 4> NodePreds; in CopyAndMoveSuccessors()
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DScheduleDAGVLIW.cpp86 void releaseSucc(SUnit *SU, const SDep &D);
115 void ScheduleDAGVLIW::releaseSucc(SUnit *SU, const SDep &D) { in releaseSucc()
DScheduleDAGSDNodes.cpp488 SDep Dep = isChain ? SDep(OpSU, SDep::Barrier) in AddSchedEdges()
489 : SDep(OpSU, SDep::Data, PhysReg); in AddSchedEdges()
620 unsigned OpIdx, SDep& dep) const{ in computeOperandLatency()
625 if (dep.getKind() != SDep::Data) in computeOperandLatency()
DScheduleDAGSDNodes.h103 unsigned OpIdx, SDep& dep) const;
/external/llvm/include/llvm/CodeGen/
DScheduleDAG.h45 class SDep {
103 SDep() : Dep(0, Data) {} in SDep() function
106 SDep(SUnit *S, Kind kind, unsigned Reg) in SDep() function
125 SDep(SUnit *S, OrderKind kind) in SDep() function
131 bool overlaps(const SDep &Other) const { in overlaps()
144 bool operator==(const SDep &Other) const {
149 bool operator!=(const SDep &Other) const {
265 struct isPodLike<SDep> { static const bool value = true; };
282 SmallVector<SDep, 4> Preds; // All sunit predecessors.
283 SmallVector<SDep, 4> Succs; // All sunit successors.
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DMachineScheduler.h282 bool addEdge(SUnit *SuccSU, const SDep &PredDep);
371 void releaseSucc(SUnit *SU, SDep *SuccEdge);
373 void releasePred(SUnit *SU, SDep *PredEdge);
/external/llvm/include/llvm/Target/
DTargetSubtargetInfo.h24 class SDep; variable
76 SDep& dep) const { } in adjustSchedDependency()
/external/llvm/lib/Target/Hexagon/
DHexagonVLIWPacketizer.cpp124 bool IsCallDependent(MachineInstr* MI, SDep::Kind DepType, unsigned DepReg);
125 bool PromoteToDotNew(MachineInstr* MI, SDep::Kind DepType,
291 SDep::Kind DepType, in IsCallDependent()
323 if (IsIndirectCall(MI) && (DepType == SDep::Data)) { in IsCallDependent()
333 static bool IsRegDependence(const SDep::Kind DepType) { in IsRegDependence()
334 return (DepType == SDep::Data || DepType == SDep::Anti || in IsRegDependence()
335 DepType == SDep::Output); in IsRegDependence()
1257 SDep::Kind DepType, MachineBasicBlock::iterator &MII, in PromoteToDotNew()
1260 assert (DepType == SDep::Data); in PromoteToDotNew()
2677 (PacketSU->Succs[i].getKind() == SDep::Anti) && in RestrictingDepExistInPacket()
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DHexagonMachineScheduler.cpp34 SUnits[su].addPred(SDep(LastSequentialCall, SDep::Barrier)); in postprocessDAG()