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Searched refs:SUnit (Results 1 – 25 of 39) sorted by relevance

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/external/llvm/include/llvm/CodeGen/
DResourcePriorityQueue.h31 struct resource_sort : public std::binary_function<SUnit*, SUnit*, bool> {
35 bool operator()(const SUnit* left, const SUnit* right) const;
40 std::vector<SUnit> *SUnits;
49 std::vector<SUnit*> Queue;
71 std::vector<SUnit*> Packet;
86 void initNodes(std::vector<SUnit> &sunits);
88 void addNode(const SUnit *SU) { in addNode()
92 void updateNode(const SUnit *SU) {} in updateNode()
110 signed SUSchedulingCost (SUnit *SU);
114 void initNumRegDefsLeft(SUnit *SU);
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DScheduleDAG.h28 class SUnit; variable
76 PointerIntPair<SUnit *, 2, Kind> Dep;
106 SDep(SUnit *S, Kind kind, unsigned Reg) in SDep()
125 SDep(SUnit *S, OrderKind kind) in SDep()
179 SUnit *getSUnit() const { in getSUnit()
184 void setSUnit(SUnit *SU) { in setSUnit()
268 class SUnit {
275 SUnit *OrigNode; // If not this, the node from which
329 SUnit(SDNode *node, unsigned nodenum)
343 SUnit(MachineInstr *instr, unsigned nodenum)
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DLatencyPriorityQueue.h25 struct latency_sort : public std::binary_function<SUnit*, SUnit*, bool> {
29 bool operator()(const SUnit* left, const SUnit* right) const;
34 std::vector<SUnit> *SUnits;
43 std::vector<SUnit*> Queue;
52 void initNodes(std::vector<SUnit> &sunits) { in initNodes()
57 void addNode(const SUnit *SU) { in addNode()
61 void updateNode(const SUnit *SU) { in updateNode()
80 virtual void push(SUnit *U);
82 virtual SUnit *pop();
84 virtual void remove(SUnit *SU);
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DScheduleDAGInstrs.h35 SUnit *SU;
37 VReg2SUnit(unsigned reg, SUnit *su): VirtReg(reg), SU(su) {} in VReg2SUnit()
47 SUnit *SU;
51 PhysRegSUOper(SUnit *su, int op, unsigned R): SU(su), OpIdx(op), Reg(R) {} in PhysRegSUOper()
112 DenseMap<MachineInstr*, SUnit*> MISUnitMap;
130 std::vector<SUnit *> PendingLoads;
153 const MCSchedClassDesc *getSchedClass(SUnit *SU) const { in getSchedClass()
166 SUnit *newSUnit(MachineInstr *MI);
169 SUnit *getSUnit(MachineInstr *MI) const;
210 virtual void dumpNode(const SUnit *SU) const;
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DMachineScheduler.h121 virtual SUnit *pickNode(bool &IsTopNode) = 0;
128 virtual void schedNode(SUnit *SU, bool IsTopNode) = 0;
132 virtual void releaseTopNode(SUnit *SU) = 0;
135 virtual void releaseBottomNode(SUnit *SU) = 0;
147 std::vector<SUnit*> Queue;
157 bool isInQueue(SUnit *SU) const { return (SU->NodeQueueId & ID); } in isInQueue()
165 typedef std::vector<SUnit*>::iterator iterator;
171 ArrayRef<SUnit*> elements() { return Queue; } in elements()
173 iterator find(SUnit *SU) { in find()
177 void push(SUnit *SU) { in push()
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DDFAPacketizer.h41 class SUnit; variable
107 std::map<MachineInstr*, SUnit*> MIToSUnit;
154 virtual bool isLegalToPacketizeTogether(SUnit *SUI, SUnit *SUJ) { in isLegalToPacketizeTogether()
160 virtual bool isLegalToPruneDependencies(SUnit *SUI, SUnit *SUJ) { in isLegalToPruneDependencies()
DScheduleDFS.h26 class SUnit; variable
144 void compute(ArrayRef<SUnit> SUnits);
148 unsigned getNumInstrs(const SUnit *SU) const { in getNumInstrs()
161 ILPValue getILP(const SUnit *SU) const { in getILP()
172 unsigned getSubtreeID(const SUnit *SU) const { in getSubtreeID()
DScheduleHazardRecognizer.h20 class SUnit; variable
60 virtual HazardType getHazardType(SUnit *m, int Stalls = 0) {
71 virtual void EmitInstruction(SUnit *) {} in EmitInstruction() argument
/external/llvm/lib/CodeGen/
DLatencyPriorityQueue.cpp22 bool latency_sort::operator()(const SUnit *LHS, const SUnit *RHS) const { in operator ()()
55 SUnit *LatencyPriorityQueue::getSingleUnscheduledPred(SUnit *SU) { in getSingleUnscheduledPred()
56 SUnit *OnlyAvailablePred = 0; in getSingleUnscheduledPred()
57 for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); in getSingleUnscheduledPred()
59 SUnit &Pred = *I->getSUnit(); in getSingleUnscheduledPred()
72 void LatencyPriorityQueue::push(SUnit *SU) { in push()
76 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in push()
91 void LatencyPriorityQueue::scheduledNode(SUnit *SU) { in scheduledNode()
92 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in scheduledNode()
104 void LatencyPriorityQueue::AdjustPriorityOfUnscheduledPreds(SUnit *SU) { in AdjustPriorityOfUnscheduledPreds()
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DScheduleDAG.cpp52 EntrySU = SUnit(); in clearDAG()
53 ExitSU = SUnit(); in clearDAG()
65 bool SUnit::addPred(const SDep &D, bool Required) { in addPred()
76 SUnit *PredSU = I->getSUnit(); in addPred()
95 SUnit *N = D.getSUnit(); in addPred()
133 void SUnit::removePred(const SDep &D) { in removePred()
141 SUnit *N = D.getSUnit(); in removePred()
178 void SUnit::setDepthDirty() { in setDepthDirty()
180 SmallVector<SUnit*, 8> WorkList; in setDepthDirty()
183 SUnit *SU = WorkList.pop_back_val(); in setDepthDirty()
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DScheduleDAGInstrs.cpp241 void ScheduleDAGInstrs::addPhysRegDataDeps(SUnit *SU, unsigned OperIdx) { in addPhysRegDataDeps()
253 SUnit *UseSU = I->SU; in addPhysRegDataDeps()
284 void ScheduleDAGInstrs::addPhysRegDeps(SUnit *SU, unsigned OperIdx) { in addPhysRegDeps()
300 SUnit *DefSU = I->SU; in addPhysRegDeps()
364 void ScheduleDAGInstrs::addVRegDefDeps(SUnit *SU, unsigned OperIdx) { in addVRegDefDeps()
385 SUnit *DefSU = DefI->SU; in addVRegDefDeps()
404 void ScheduleDAGInstrs::addVRegUseDeps(SUnit *SU, unsigned OperIdx) { in addVRegUseDeps()
418 SUnit *DefSU = getSUnit(Def); in addVRegUseDeps()
559 SUnit *SUa, SUnit *SUb, SUnit *ExitSU, unsigned *Depth, in iterateChainSucc()
560 SmallPtrSet<const SUnit*, 16> &Visited) { in iterateChainSucc() argument
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DMachineScheduler.cpp326 bool ScheduleDAGMI::addEdge(SUnit *SuccSU, const SDep &PredDep) { in addEdge()
343 void ScheduleDAGMI::releaseSucc(SUnit *SU, SDep *SuccEdge) { in releaseSucc()
344 SUnit *SuccSU = SuccEdge->getSUnit(); in releaseSucc()
366 void ScheduleDAGMI::releaseSuccessors(SUnit *SU) { in releaseSuccessors()
367 for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in releaseSuccessors()
377 void ScheduleDAGMI::releasePred(SUnit *SU, SDep *PredEdge) { in releasePred()
378 SUnit *PredSU = PredEdge->getSUnit(); in releasePred()
400 void ScheduleDAGMI::releasePredecessors(SUnit *SU) { in releasePredecessors()
401 for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); in releasePredecessors()
527 SmallVector<SUnit*, 8> TopRoots, BotRoots; in schedule()
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DScheduleDAGPrinter.cpp44 static bool isNodeHidden(const SUnit *Node) { in isNodeHidden()
48 static bool hasNodeAddressLabel(const SUnit *Node, in hasNodeAddressLabel()
55 static std::string getEdgeAttributes(const SUnit *Node, in getEdgeAttributes()
66 std::string getNodeLabel(const SUnit *Node, const ScheduleDAG *Graph);
67 static std::string getNodeAttributes(const SUnit *N, in getNodeAttributes()
79 std::string DOTGraphTraits<ScheduleDAG*>::getNodeLabel(const SUnit *SU, in getNodeLabel()
DPostRASchedulerList.cpp113 std::vector<SUnit*> PendingQueue;
128 std::vector<SUnit*> Sequence;
174 void ReleaseSucc(SUnit *SU, SDep *SuccEdge);
175 void ReleaseSuccessors(SUnit *SU);
176 void ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle);
245 if (SUnit *SU = Sequence[i]) in dumpSchedule()
565 void SchedulePostRATDList::ReleaseSucc(SUnit *SU, SDep *SuccEdge) { in ReleaseSucc()
566 SUnit *SuccSU = SuccEdge->getSUnit(); in ReleaseSucc()
600 void SchedulePostRATDList::ReleaseSuccessors(SUnit *SU) { in ReleaseSuccessors()
601 for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in ReleaseSuccessors()
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/external/llvm/lib/CodeGen/SelectionDAG/
DScheduleDAGRRList.cpp124 std::vector<SUnit*> PendingQueue;
143 std::vector<SUnit*> LiveRegDefs;
144 std::vector<SUnit*> LiveRegGens;
148 SmallVector<SUnit*, 4> Interferences;
149 typedef DenseMap<SUnit*, SmallVector<unsigned, 4> > LRegsMapT;
158 DenseMap<SUnit*, SUnit*> CallSeqEndForStart;
185 bool IsReachable(const SUnit *SU, const SUnit *TargetSU) { in IsReachable()
191 bool WillCreateCycle(SUnit *SU, SUnit *TargetSU) { in WillCreateCycle()
198 void AddPred(SUnit *SU, const SDep &D) { in AddPred()
206 void RemovePred(SUnit *SU, const SDep &D) { in RemovePred()
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DResourcePriorityQueue.cpp71 ResourcePriorityQueue::numberRCValPredInSU(SUnit *SU, unsigned RCId) { in numberRCValPredInSU()
73 for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); in numberRCValPredInSU()
78 SUnit *PredSU = I->getSUnit(); in numberRCValPredInSU()
108 unsigned ResourcePriorityQueue::numberRCValSuccInSU(SUnit *SU, in numberRCValSuccInSU()
111 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in numberRCValSuccInSU()
116 SUnit *SuccSU = I->getSUnit(); in numberRCValSuccInSU()
146 static unsigned numberCtrlDepsInSU(SUnit *SU) { in numberCtrlDepsInSU()
148 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in numberCtrlDepsInSU()
156 static unsigned numberCtrlPredInSU(SUnit *SU) { in numberCtrlPredInSU()
158 for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); in numberCtrlPredInSU()
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DScheduleDAGFast.cpp48 SmallVector<SUnit *, 16> Queue;
52 void push(SUnit *U) { in push()
56 SUnit *pop() { in pop()
58 SUnit *V = Queue.back(); in pop()
76 std::vector<SUnit*> LiveRegDefs;
87 void AddPred(SUnit *SU, const SDep &D) { in AddPred()
93 void RemovePred(SUnit *SU, const SDep &D) { in RemovePred()
98 void ReleasePred(SUnit *SU, SDep *PredEdge);
99 void ReleasePredecessors(SUnit *SU, unsigned CurCycle);
100 void ScheduleNodeBottomUp(SUnit*, unsigned);
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DScheduleDAGSDNodes.h43 std::vector<SUnit*> Sequence;
75 SUnit *newSUnit(SDNode *N);
80 SUnit *Clone(SUnit *N);
92 void InitVRegCycleFlag(SUnit *SU);
96 void InitNumRegDefsLeft(SUnit *SU);
100 virtual void computeLatency(SUnit *SU);
120 virtual void dumpNode(const SUnit *SU) const;
124 virtual std::string getGraphNodeLabel(const SUnit *SU) const;
140 RegDefIter(const SUnit *SU, const ScheduleDAGSDNodes *SD);
180 void EmitPhysRegCopy(SUnit *SU, DenseMap<SUnit*, unsigned> &VRBaseMap,
DScheduleDAGVLIW.cpp60 std::vector<SUnit*> PendingQueue;
86 void releaseSucc(SUnit *SU, const SDep &D);
87 void releaseSuccessors(SUnit *SU);
88 void scheduleNodeTopDown(SUnit *SU, unsigned CurCycle);
115 void ScheduleDAGVLIW::releaseSucc(SUnit *SU, const SDep &D) { in releaseSucc()
116 SUnit *SuccSU = D.getSUnit(); in releaseSucc()
139 void ScheduleDAGVLIW::releaseSuccessors(SUnit *SU) { in releaseSuccessors()
141 for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in releaseSuccessors()
153 void ScheduleDAGVLIW::scheduleNodeTopDown(SUnit *SU, unsigned CurCycle) { in scheduleNodeTopDown()
185 std::vector<SUnit*> NotReady; in listScheduleTopDown()
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DScheduleDAGSDNodes.cpp68 SUnit *ScheduleDAGSDNodes::newSUnit(SDNode *N) { in newSUnit()
70 const SUnit *Addr = 0; in newSUnit()
74 SUnits.push_back(SUnit(N, (unsigned)SUnits.size())); in newSUnit()
78 SUnit *SU = &SUnits.back(); in newSUnit()
89 SUnit *ScheduleDAGSDNodes::Clone(SUnit *Old) { in Clone()
90 SUnit *SU = newSUnit(Old->getNode()); in Clone()
330 SmallVector<SUnit*, 8> CallSUnits; in BuildSchedUnits()
345 SUnit *NodeSUnit = newSUnit(NI); in BuildSchedUnits()
408 SUnit *SU = CallSUnits.pop_back_val(); in BuildSchedUnits()
415 SUnit *SrcSU = &SUnits[SrcN->getNodeId()]; in BuildSchedUnits()
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/external/llvm/lib/Target/R600/
DR600MachineScheduler.h29 bool operator()(const SUnit *S1, const SUnit *S2) { in operator()
66 std::multiset<SUnit *, CompareSUnit> AvailableAlus[AluLast];
95 virtual SUnit *pickNode(bool &IsTopNode);
96 virtual void schedNode(SUnit *SU, bool IsTopNode);
97 virtual void releaseTopNode(SUnit *SU);
98 virtual void releaseBottomNode(SUnit *SU);
103 int getInstKind(SUnit *SU);
105 AluKind getAluKind(SUnit *SU) const;
108 SUnit *AttemptFillSlot (unsigned Slot);
110 SUnit *PopInst(std::multiset<SUnit *, CompareSUnit> &Q);
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DR600MachineScheduler.cpp63 SUnit* R600SchedStrategy::pickNode(bool &IsTopNode) { in pickNode()
64 SUnit *SU = 0; in pickNode()
111 const SUnit &S = DAG->SUnits[i]; in pickNode()
121 void R600SchedStrategy::schedNode(SUnit *SU, bool IsTopNode) { in schedNode()
164 void R600SchedStrategy::releaseTopNode(SUnit *SU) { in releaseTopNode()
173 void R600SchedStrategy::releaseBottomNode(SUnit *SU) { in releaseBottomNode()
185 R600SchedStrategy::AluKind R600SchedStrategy::getAluKind(SUnit *SU) const { in getAluKind()
246 int R600SchedStrategy::getInstKind(SUnit* SU) { in getInstKind()
290 SUnit *R600SchedStrategy::PopInst(std::multiset<SUnit *, CompareSUnit> &Q) { in PopInst() argument
293 for (std::set<SUnit *, CompareSUnit>::iterator It = Q.begin(), E = Q.end(); in PopInst()
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/external/llvm/lib/Target/Hexagon/
DHexagonMachineScheduler.h52 std::vector<SUnit*> Packet;
88 bool isResourceAvailable(SUnit *SU);
89 bool reserveResources(SUnit *SU);
115 SUnit *SU;
176 bool checkHazard(SUnit *SU);
178 void releaseNode(SUnit *SU, unsigned ReadyCycle);
182 void bumpNode(SUnit *SU);
186 void removeReady(SUnit *SU);
188 SUnit *pickOnlyChoice();
212 virtual SUnit *pickNode(bool &IsTopNode);
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DHexagonMachineScheduler.cpp25 SUnit* LastSequentialCall = NULL; in postprocessDAG()
43 bool VLIWResourceModel::isResourceAvailable(SUnit *SU) { in isResourceAvailable()
68 for (SUnit::const_succ_iterator I = Packet[i]->Succs.begin(), in isResourceAvailable()
83 bool VLIWResourceModel::reserveResources(SUnit *SU) { in reserveResources()
156 SmallVector<SUnit*, 8> TopRoots, BotRoots; in schedule()
182 while (SUnit *SU = SchedImpl->pickNode(IsTopNode)) { in schedule()
219 void ConvergingVLIWScheduler::releaseTopNode(SUnit *SU) { in releaseTopNode()
223 for (SUnit::succ_iterator I = SU->Preds.begin(), E = SU->Preds.end(); in releaseTopNode()
236 void ConvergingVLIWScheduler::releaseBottomNode(SUnit *SU) { in releaseBottomNode()
242 for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in releaseBottomNode()
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/external/llvm/lib/Target/PowerPC/
DPPCHazardRecognizers.h33 virtual HazardType getHazardType(SUnit *SU, int Stalls);
34 virtual void EmitInstruction(SUnit *SU);
68 virtual HazardType getHazardType(SUnit *SU, int Stalls);
69 virtual void EmitInstruction(SUnit *SU);

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