Searched refs:SubReg1 (Results 1 – 2 of 2) sorted by relevance
/external/llvm/lib/CodeGen/ |
D | TargetInstrInfo.cpp | 139 unsigned SubReg1 = MI->getOperand(Idx1).getSubReg(); in commuteInstruction() local 154 SubReg0 = SubReg1; in commuteInstruction() 169 MI->getOperand(Idx2).setSubReg(SubReg1); in commuteInstruction()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelDAGToDAG.cpp | 1540 SDValue SubReg1 = CurDAG->getTargetConstant(ARM::gsub_1, MVT::i32); in createGPRPairNode() local 1541 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createGPRPairNode() 1551 SDValue SubReg1 = CurDAG->getTargetConstant(ARM::ssub_1, MVT::i32); in createSRegPairNode() local 1552 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createSRegPairNode() 1561 SDValue SubReg1 = CurDAG->getTargetConstant(ARM::dsub_1, MVT::i32); in createDRegPairNode() local 1562 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createDRegPairNode() 1571 SDValue SubReg1 = CurDAG->getTargetConstant(ARM::qsub_1, MVT::i32); in createQRegPairNode() local 1572 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createQRegPairNode() 1583 SDValue SubReg1 = CurDAG->getTargetConstant(ARM::ssub_1, MVT::i32); in createQuadSRegsNode() local 1586 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1, in createQuadSRegsNode() [all …]
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