Searched refs:addressing (Results 1 – 25 of 88) sorted by relevance
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/external/libusb-compat/ |
D | NEWS | 12 * Further improvements to match libusb-0.1 endpoint addressing behaviour 21 * Match libusb-0.1 endpoint addressing behaviour
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/external/llvm/test/CodeGen/X86/ |
D | 2008-12-01-loop-iv-used-outside-loop.ll | 2 ; The inner loop should use [reg] addressing, not [reg+reg] addressing.
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D | large-gep-scale.ll | 5 ; correct addressing still.
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D | rip-rel-address.ll | 4 ; Use %rip-relative addressing even in static mode on x86-64, because
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D | rip-rel-lea.ll | 5 ; Use %rip-relative addressing even in static mode on x86-64, because
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D | fast-isel-constpool.ll | 2 ; Make sure fast isel uses rip-relative addressing when required.
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D | loop-strength-reduce-2.ll | 5 ; since too many registers are needed to subsume it into the addressing modes.
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/external/llvm/lib/Target/R600/ |
D | AMDILBase.td | 57 "Specify if 64bit addressing should be used.">; 62 "Specify if 64bit sized pointers with 32bit addressing should be used.">;
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D | R600RegisterInfo.td | 31 // Indirect addressing offset registers 119 // Register classes for indirect addressing
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/external/llvm/test/CodeGen/Hexagon/ |
D | pred-absolute-store.ll | 3 ; addressing mode.
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D | absaddr-store.ll | 2 ; Check that we generate load instructions with absolute addressing mode.
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/external/llvm/test/CodeGen/ARM/ |
D | lsr-scale-addr-mode.ll | 2 ; Should use scaled addressing mode.
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/external/llvm/test/Transforms/LoopStrengthReduce/ |
D | dont_reduce_bytes.ll | 2 ; support an efficient 'mem[r1+r2]' addressing mode.
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/external/llvm/test/CodeGen/AArch64/ |
D | zero-reg.ll | 22 ; as an addressing register: "str w0, [xzr]" is not a valid A64
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D | local_vars.ll | 10 ; when FP-elim is implemented, and when addressing from FP is
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/external/qemu/distrib/jpeg-6b/ |
D | jconfig.dj | 14 #undef NEED_FAR_POINTERS /* DJGPP uses flat 32-bit addressing */
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D | jconfig.wat | 14 #undef NEED_FAR_POINTERS /* Watcom uses flat 32-bit addressing */
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/external/jpeg/ |
D | jconfig.dj | 14 #undef NEED_FAR_POINTERS /* DJGPP uses flat 32-bit addressing */
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D | jconfig.wat | 14 #undef NEED_FAR_POINTERS /* Watcom uses flat 32-bit addressing */
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/external/openssl/crypto/perlasm/ |
D | readme | 28 &BP(off,base,index,scale) Byte pointer addressing 29 &DWP(off,base,index,scale) Word pointer addressing
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/external/llvm/test/Transforms/IndVarSimplify/ |
D | preserve-signed-wrap.ll | 4 ; sext for the addressing, however it shouldn't eliminate the sext
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/external/llvm/test/Transforms/InstCombine/ |
D | align-2d-gep.ll | 5 ; aren't yet aligned. Instcombine can understand the addressing in the
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/external/llvm/test/Analysis/CostModel/X86/ |
D | gep.ll | 9 ; the instruction addressing mode.
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/external/llvm/test/Analysis/CostModel/ARM/ |
D | gep.ll | 8 ; folded into the instruction addressing mode.
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/external/llvm/docs/HistoricalNotes/ |
D | 2001-02-06-TypeNotationDebateResp2.txt | 21 * As a low level VM, we want to expose addressing computations
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