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Searched refs:enablePostRAScheduler (Results 1 – 13 of 13) sorted by relevance

/external/llvm/lib/Target/
DTargetSubtargetInfo.cpp29 bool TargetSubtargetInfo::enablePostRAScheduler( in enablePostRAScheduler() function in TargetSubtargetInfo
/external/llvm/lib/Target/MBlaze/
DMBlazeSubtarget.cpp49 enablePostRAScheduler(CodeGenOpt::Level OptLevel, in enablePostRAScheduler() function in MBlazeSubtarget
DMBlazeSubtarget.h57 bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
/external/llvm/include/llvm/Target/
DTargetSubtargetInfo.h70 virtual bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
/external/llvm/lib/Target/Mips/
DMipsSubtarget.cpp66 MipsSubtarget::enablePostRAScheduler(CodeGenOpt::Level OptLevel, in enablePostRAScheduler() function in MipsSubtarget
DMipsSubtarget.h107 virtual bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
/external/llvm/lib/Target/PowerPC/
DPPCSubtarget.cpp124 bool PPCSubtarget::enablePostRAScheduler( in enablePostRAScheduler() function in PPCSubtarget
DPPCSubtarget.h177 bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
/external/llvm/lib/Target/ARM/
DARMSubtarget.h289 bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
DARMSubtarget.cpp224 bool ARMSubtarget::enablePostRAScheduler( in enablePostRAScheduler() function in ARMSubtarget
/external/llvm/lib/Target/X86/
DX86Subtarget.h349 bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
DX86Subtarget.cpp469 bool X86Subtarget::enablePostRAScheduler( in enablePostRAScheduler() function in X86Subtarget
/external/llvm/lib/CodeGen/
DPostRASchedulerList.cpp273 if (!ST.enablePostRAScheduler(PassConfig->getOptLevel(), AntiDepMode, in runOnMachineFunction()