| /external/llvm/test/CodeGen/AArch64/ |
| D | illegal-float-ops.ll | 9 declare fp128 @llvm.cos.f128(fp128)
22 %cosfp128 = call fp128 @llvm.cos.f128(fp128 %fp128)
31 declare fp128 @llvm.exp.f128(fp128)
44 %expfp128 = call fp128 @llvm.exp.f128(fp128 %fp128)
53 declare fp128 @llvm.exp2.f128(fp128)
66 %exp2fp128 = call fp128 @llvm.exp2.f128(fp128 %fp128)
75 declare fp128 @llvm.log.f128(fp128)
88 %logfp128 = call fp128 @llvm.log.f128(fp128 %fp128)
97 declare fp128 @llvm.log2.f128(fp128)
110 %log2fp128 = call fp128 @llvm.log2.f128(fp128 %fp128)
[all …]
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| /external/valgrind/main/none/tests/s390x/ |
| D | fpconv.c | 56 long double f128; \
57 printf(#insn " %Lf\n", I2F(insn, 0, f128, round)); \
58 printf(#insn " %Lf\n", I2F(insn, 1, f128, round)); \
59 printf(#insn " %Lf\n", I2F(insn, 0xffffffffUL, f128, round)); \
60 printf(#insn " %Lf\n", I2F(insn, 0x80000000UL, f128, round)); \
61 printf(#insn " %Lf\n", I2F(insn, 0x7fffffffUL, f128, round)); \
62 printf(#insn " %Lf\n", I2F(insn, 0x100000000UL, f128, round)); \
63 printf(#insn " %Lf\n", I2F(insn, 0xffffffffffffffffUL, f128, round)); \
64 printf(#insn " %Lf\n", I2F(insn, 0x8000000000000000UL, f128, round)); \
65 printf(#insn " %Lf\n", I2F(insn, 0x7fffffffffffffffUL, f128, round)); \
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 375 if (RetVT == MVT::f128) in getFPEXT()
378 if (RetVT == MVT::f128) in getFPEXT()
393 if (OpVT == MVT::f128) in getFPROUND()
400 if (OpVT == MVT::f128) in getFPROUND()
441 } else if (OpVT == MVT::f128) { in getFPTOSINT()
491 } else if (OpVT == MVT::f128) { in getFPTOUINT()
519 if (RetVT == MVT::f128) in getSINTTOFP()
530 if (RetVT == MVT::f128) in getSINTTOFP()
541 if (RetVT == MVT::f128) in getSINTTOFP()
559 if (RetVT == MVT::f128) in getUINTTOFP()
[all …]
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 58 addRegisterClass(MVT::f128, &AArch64::FPR128RegClass); in AArch64TargetLowering()
167 setOperationAction(ISD::ConstantFP, MVT::f128, Legal); in AArch64TargetLowering()
208 setOperationAction(ISD::FABS, MVT::f128, Expand); in AArch64TargetLowering()
209 setOperationAction(ISD::FADD, MVT::f128, Custom); in AArch64TargetLowering()
210 setOperationAction(ISD::FCOPYSIGN, MVT::f128, Expand); in AArch64TargetLowering()
211 setOperationAction(ISD::FCOS, MVT::f128, Expand); in AArch64TargetLowering()
212 setOperationAction(ISD::FDIV, MVT::f128, Custom); in AArch64TargetLowering()
213 setOperationAction(ISD::FMA, MVT::f128, Expand); in AArch64TargetLowering()
214 setOperationAction(ISD::FMUL, MVT::f128, Custom); in AArch64TargetLowering()
215 setOperationAction(ISD::FNEG, MVT::f128, Expand); in AArch64TargetLowering()
[all …]
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| /external/llvm/test/CodeGen/PowerPC/ |
| D | longdbl-truncate.ll | 2 …8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
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| D | asm-Zy.ll | 1 …:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:12…
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| D | 2008-10-17-AsmMatchingOperands.ll | 8 …8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
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| D | quadint-return.ll | 4 …:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:12…
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| D | itofp128.ll | 3 …8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
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| D | int-fp-conv-0.ll | 5 …8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
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| D | 2008-07-17-Fneg.ll | 2 …8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
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| D | pr15359.ll | 4 …i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f16:16:16-f32:32:32-f64:64:64-f128:128:128-v64:64:64-v…
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| D | mcm-12.ll | 6 …:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:12…
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| D | 2010-12-18-PPCStackRefs.ll | 3 …8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128-n32"
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| D | tls-ie.ll | 6 …:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:12…
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| D | 2008-07-15-SignExtendInreg.ll | 2 …8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
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| D | tls-gd.ll | 6 …:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:12…
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| D | varargs-struct-float.ll | 3 …:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:12…
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| /external/llvm/test/CodeGen/SPARC/ |
| D | 2008-10-10-InlineAsmRegOperand.ll | 4 …:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f128:128:128"
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| D | 2012-05-01-LowerArguments.ll | 5 …:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f128:128:128"
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| D | 2008-10-10-InlineAsmMemoryOperand.ll | 4 …:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f128:128:128"
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| /external/llvm/test/Transforms/GVN/ |
| D | pr10820.ll | 4 …4-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-f128:128:128-n8:16:32:64"
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| /external/llvm/test/Analysis/CostModel/PowerPC/ |
| D | insert_extract.ll | 2 …:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:12…
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| /external/llvm/test/CodeGen/X86/ |
| D | pass-three.ll | 2 …i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f16:16:16-f32:32:32-f64:64:64-f128:128:128-v64:64:64-v…
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| /external/llvm/lib/IR/ |
| D | ValueTypes.cpp | 125 case MVT::f128: return "f128"; in getEVTString()
191 case MVT::f128: return Type::getFP128Ty(Context); in getTypeForEVT()
251 case Type::FP128TyID: return MVT(MVT::f128); in getVT()
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