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Searched refs:isImm (Results 1 – 25 of 89) sorted by relevance

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/external/llvm/lib/Target/AArch64/MCTargetDesc/
DAArch64MCCodeEmitter.cpp128 assert(MO.isImm() && "Unexpected address requested"); in getAddressWithFixup()
144 if (ImmOp.isImm()) in getOffsetUImm12OpValue()
221 if (MO.isImm()) in getAddSubImmOpValue()
255 if (MO.isImm()) in getAdrpLabelOpValue()
290 assert(MO.isImm() && "Only immediate expected for shift"); in getBitfield32LSLOpValue()
300 assert(MO.isImm() && "Only immediate expected for shift"); in getBitfield64LSLOpValue()
315 assert(MO.isImm()); in getLabelOpValue()
325 if (MO.isImm()) in getLoadLitLabelOpValue()
350 } else if (MO.isImm()) { in getMachineOpValue()
366 if (UImm16MO.isImm()) { in getMoveWideImmOpValue()
[all …]
/external/llvm/lib/Target/PowerPC/MCTargetDesc/
DPPCMCCodeEmitter.cpp117 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups); in getDirectBrEncoding()
139 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups); in getCondBrEncoding()
150 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups); in getHA16Encoding()
161 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups); in getLO16Encoding()
177 if (MO.isImm()) in getMemRIEncoding()
199 if (MO.isImm()) in getMemRIXEncoding()
249 assert(MO.isImm() && in getMachineOpValue()
/external/llvm/lib/Target/Mips/MCTargetDesc/
DMipsDirectObjLower.cpp26 assert(Inst.getOperand(2).isImm()); in LowerLargeShift()
63 assert(InstIn.getOperand(2).isImm()); in LowerDextDins()
65 assert(InstIn.getOperand(3).isImm()); in LowerDextDins()
DMipsMCCodeEmitter.cpp164 if (MO.isImm()) return MO.getImm(); in getBranchTargetOpValue()
183 if (MO.isImm()) return MO.getImm(); in getJumpTargetOpValue()
202 } else if (MO.isImm()) { in getMachineOpValue()
323 assert(MI.getOperand(OpNo).isImm()); in getSizeExtEncoding()
333 assert(MI.getOperand(OpNo-1).isImm()); in getSizeInsEncoding()
334 assert(MI.getOperand(OpNo).isImm()); in getSizeInsEncoding()
/external/llvm/lib/Target/MBlaze/InstPrinter/
DMBlazeInstPrinter.cpp40 } else if (Op.isImm()) { in printOperand()
51 if (MO.isImm()) in printFSLImm()
60 if (MO.isImm()) in printUnsignedImm()
/external/llvm/lib/Target/Hexagon/
DHexagonHardwareLoops.cpp253 bool isImm() const { return Kind == CV_Immediate; } in isImm() function in __anon431341ec0111::CountValue
264 assert(isImm() && "Wrong CountValue accessor"); in getImm()
271 if (isImm()) { OS << Contents.ImmVal; } in print()
528 if (Op2.isImm() || Op1.getReg() == IVReg) in getLoopTripCount()
567 assert(EndValue->isImm() && "Unrecognized latch comparison"); in getLoopTripCount()
575 assert(InitialValue->isImm()); in getLoopTripCount()
641 assert (Start->isReg() || Start->isImm()); in computeCount()
642 assert (End->isReg() || End->isImm()); in computeCount()
658 if (Start->isImm() && End->isImm()) { in computeCount()
727 bool RegToImm = Start->isReg() && End->isImm(); // for (reg..imm) in computeCount()
[all …]
DHexagonAsmPrinter.h105 if (MI->getOperand(OpNo).isImm()) { in printBranchOperand()
122 if (MI->getOperand(OpNo).isImm()) { in printSymbolHi()
133 if (MI->getOperand(OpNo).isImm()) { in printSymbolLo()
/external/llvm/lib/Target/PowerPC/
DPPCCodeEmitter.cpp184 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO); in getDirectBrEncoding()
200 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO); in getHA16Encoding()
209 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO); in getLO16Encoding()
223 if (MO.isImm()) in getMemRIEncoding()
239 if (MO.isImm()) in getMemRIXEncoding()
266 assert(MO.isImm() && in getMachineOpValue()
DPPCCTRLoops.cpp155 bool isImm() const { return Kind == CV_Immediate; } in isImm() function in __anon9f6c02960111::CountValue
166 assert(isImm() && "Wrong CountValue accessor"); in getImm()
178 if (isImm()) { OS << getImm(); } in print()
378 assert(MO.isImm() && "IV Cmp Operand should be an immediate"); in getTripCount()
626 if (TripCount->isImm()) { in convertToCTRLoop()
701 assert(TripCount->isImm() && "Expecting immedate vaule for trip count"); in convertToCTRLoop()
728 TripCount->isImm() ? RegState::Kill : 0); in convertToCTRLoop()
/external/llvm/lib/Target/MSP430/InstPrinter/
DMSP430InstPrinter.cpp37 if (Op.isImm()) in printPCRelImmOperand()
51 } else if (Op.isImm()) { in printOperand()
79 assert(Disp.isImm() && "Expected immediate in displacement field"); in printSrcMemOperand()
/external/llvm/lib/Target/PowerPC/InstPrinter/
DPPCInstPrinter.cpp170 if (MI->getOperand(OpNo).isImm()) in printS16X4ImmOperand()
178 if (!MI->getOperand(OpNo).isImm()) in printBranchOperand()
224 if (MI->getOperand(OpNo).isImm()) in printMemRegImmShifted()
279 if (Op.isImm()) { in printOperand()
290 if (MI->getOperand(OpNo).isImm()) in printSymbolLo()
307 if (MI->getOperand(OpNo).isImm()) in printSymbolHi()
/external/llvm/lib/Target/AArch64/InstPrinter/
DAArch64InstPrinter.cpp96 if (Imm12Op.isImm()) { in printAddSubImmLSL0Operand()
175 assert(MOImm8.isImm() in printFPImmOperand()
217 if (!MO.isImm()) { in printLabelOperand()
246 if (MOImm.isImm()) { in printOffsetUImm12Operand()
262 if (Shift == A64SE::LSL && MO.isImm() && MO.getImm() == 0) in printShiftOperand()
282 if (UImm16MO.isImm()) { in printMoveWideImmOperand()
377 } else if (Op.isImm()) { in printOperand()
/external/llvm/lib/Target/Sparc/
DSparcAsmPrinter.cpp76 if (MI->getOpcode() == SP::SETHIi && !MO.isReg() && !MO.isImm()) { in printOperand()
80 !MO.isReg() && !MO.isImm()) { in printOperand()
125 if (MI->getOperand(opNum+1).isImm() && in printMemOperand()
251 assert(MI->getOperand(0).isReg() && MI->getOperand(1).isImm() && in getDebugValueLocation()
/external/llvm/lib/Target/X86/InstPrinter/
DX86IntelInstPrinter.cpp121 if (Op.isImm()) in printPCRelImm()
150 } else if (Op.isImm()) { in printOperand()
188 if (!DispSpec.isImm()) { in printMemReference()
DX86ATTInstPrinter.cpp133 if (Op.isImm()) in printPCRelImm()
157 } else if (Op.isImm()) { in printOperand()
189 if (DispSpec.isImm()) { in printMemReference()
/external/llvm/lib/Target/R600/MCTargetDesc/
DSIMCCodeEmitter.cpp89 if (MO.isImm()) in getLitEncoding()
157 if (Op.isImm()) in EncodeInstruction()
197 } else if (MO.isImm()) in getMachineOpValue()
/external/llvm/include/llvm/MC/
DMCInst.h57 bool isImm() const { return Kind == kImmediate; } in isImm() function
75 assert(isImm() && "This is not an immediate"); in getImm()
79 assert(isImm() && "This is not an immediate"); in setImm()
/external/llvm/lib/Target/XCore/InstPrinter/
DXCoreInstPrinter.cpp79 if (Op.isImm()) { in printOperand()
92 if (MI->getOperand(opNum+1).isImm() && MI->getOperand(opNum+1).getImm() == 0) in printMemOperand()
/external/llvm/lib/Target/AArch64/
DAArch64AsmPrinter.cpp35 && MI->getOperand(1).isImm() && "unexpected custom DBG_VALUE"); in getDebugValueLocation()
67 if (MO.isImm() && MO.getImm() == 0) { in printModifiedGPRAsmOperand()
195 if (!MI->getOperand(OpNum).isImm()) in PrintAsmOperand()
284 assert(MI->getOperand(0).isReg() && MI->getOperand(1).isImm()); in PrintDebugValueComment()
/external/llvm/lib/Target/Hexagon/InstPrinter/
DHexagonInstPrinter.cpp97 } else if(MO.isImm()) { in printOperand()
110 } else if(MO.isImm()) { in printImmOperand()
202 if (MO.isImm()) { in printSymbol()
/external/llvm/utils/TableGen/
DFastISelEmitter.cpp96 bool isImm() const { return Repr >= OK_Imm; } in isImm() function in __anone179e0f80311::OperandsSignature::OpKind
98 unsigned getImmCode() const { assert(isImm()); return Repr-OK_Imm; } in getImmCode()
129 if (Operands[i].isImm() && Operands[i].getImmCode() != 0) in hasAnyImmediateCodes()
139 if (!Operands[i].isImm()) in getWithoutImmCodes()
149 if (!Operands[i].isImm()) continue; in emitImmediatePredicate()
284 } else if (Operands[i].isImm()) { in PrintParameters()
310 } else if (Operands[i].isImm()) { in PrintArguments()
326 } else if (Operands[i].isImm()) { in PrintArguments()
/external/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp553 assert(isImm() && "Invalid access!"); in getImm()
584 bool isImm() const { return Kind == k_Immediate; } in isImm() function in __anon8d2ad9e80311::ARMOperand
586 if (!isImm()) return false; in isFPImm()
593 if (!isImm()) return false; in isFBits16()
600 if (!isImm()) return false; in isFBits32()
607 if (!isImm()) return false; in isImm8s4()
614 if (!isImm()) return false; in isImm0_1020s4()
621 if (!isImm()) return false; in isImm0_508s4()
628 if (!isImm()) return false; in isImm0_508s4Neg()
636 if (!isImm()) return false; in isImm0_255()
[all …]
/external/llvm/lib/Target/X86/
DX86AsmPrinter.cpp285 if (DispSpec.isImm()) { in printLeaMemReference()
359 if (!DispSpec.isImm()) { in printIntelMemReference()
421 if (MO.isImm()) { in PrintAsmOperand()
440 if (MO.isImm()) in PrintAsmOperand()
473 if (MO.isImm()) { in PrintAsmOperand()
711 if (MI->getOperand(0).isReg() && MI->getOperand(3).isImm()) in getDebugValueLocation()
/external/llvm/lib/Target/R600/InstPrinter/
DAMDGPUInstPrinter.cpp35 } else if (Op.isImm()) { in printOperand()
72 assert(Op.isImm()); in printIfSet()
/external/llvm/lib/Target/XCore/
DXCoreInstrInfo.cpp48 return op.isImm() && op.getImm() == 0; in isZeroImm()
62 (MI->getOperand(2).isImm()) && // the imm is zero in isLoadFromStackSlot()
84 (MI->getOperand(2).isImm()) && // the imm is zero in isStoreToStackSlot()

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