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Searched refs:isLogicalImm (Results 1 – 6 of 6) sorted by relevance

/external/llvm/lib/Target/AArch64/
DAArch64ISelDAGToDAG.cpp169 if (!A64Imms::isLogicalImm(RegWidth, CN->getZExtValue(), Bits)) in SelectLogicalImm()
199 } else if (A64Imms::isLogicalImm(DestWidth, BitPat, LogicalBits)) { in TrySelectToMoveImm()
DAArch64ISelLowering.cpp2891 if (A64Imms::isLogicalImm(32, CVal, Bits)) in LowerAsmOperandForConstraint()
2895 if (A64Imms::isLogicalImm(64, CVal, Bits)) in LowerAsmOperandForConstraint()
DAArch64InstrInfo.td3571 let PredicateMethod = "isLogicalImm" # note # "<" # size # ">";
/external/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.h770 bool isLogicalImm(unsigned RegWidth, uint64_t Imm, uint32_t &Bits);
DAArch64BaseInfo.cpp662 bool A64Imms::isLogicalImm(unsigned RegWidth, uint64_t Imm, uint32_t &Bits) { in isLogicalImm() function in A64Imms
/external/llvm/lib/Target/AArch64/AsmParser/
DAArch64AsmParser.cpp402 template<unsigned RegWidth> bool isLogicalImm() const { in isLogicalImm() function in __anoncf55007a0211::AArch64Operand
409 return A64Imms::isLogicalImm(RegWidth, CE->getValue(), Bits); in isLogicalImm()
413 if (!isLogicalImm<RegWidth>()) return false; in isLogicalImmMOV()
910 A64Imms::isLogicalImm(RegWidth, CE->getValue(), Bits); in addLogicalImmOperands()