/external/llvm/test/MC/Disassembler/ARM/ |
D | memory-arm-instructions.txt | 194 # CHECK: ldrsb r3, [r4 195 # CHECK: ldrsb r2, [r7, #17 196 # CHECK: ldrsb r1, [r8, #255]! 197 # CHECK: ldrsb r12, [sp], #9 213 # CHECK: ldrsb r6, [r5, r4 214 # CHECK: ldrsb r3, [r8, r11]! 215 # CHECK: ldrsb r1, [r2, -r1]! 216 # CHECK: ldrsb r9, [r7], r2 217 # CHECK: ldrsb r4, [r3], -r2
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D | thumb2.txt | 736 # CHECK: ldrsb r5, [r5, #-4] 737 # CHECK: ldrsb.w r5, [r6, #32] 738 # CHECK: ldrsb.w r5, [r6, #33] 739 # CHECK: ldrsb.w r5, [r6, #257] 740 # CHECK: ldrsb.w lr, [r7, #257] 752 # CHECK: ldrsb.w r1, [r8, r1] 753 # CHECK: ldrsb.w r4, [r5, r2] 754 # CHECK: ldrsb.w r6, [r0, r2, lsl #3] 755 # CHECK: ldrsb.w r8, [r8, r2, lsl #2] 756 # CHECK: ldrsb.w r7, [sp, r2, lsl #1] [all …]
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D | thumb1.txt | 224 # CHECK: ldrsb r6, [r2, r6]
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D | thumb-tests.txt | 272 # CHECK: ldrsb r1, [r0, r0]
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/external/llvm/test/CodeGen/ARM/ |
D | fast-isel-fold.ll | 72 ; ARM: ldrsb 75 ; THUMB: ldrsb
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D | fast-isel-ldrh-strh-arm.ll | 127 ; ARM: ldrsb r0, [r0, #-8] 136 ; ARM: ldrsb r0, [r0, #-255] 147 ; ARM: ldrsb r0, [r0]
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D | trunc_ldr.ll | 2 ; RUN: llc < %s -march=arm | grep ldrsb.*7 | count 1
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D | load.ll | 2 ; RUN: grep ldrsb %t
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D | ldr_ext.ll | 18 ; CHECK: ldrsb
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/external/llvm/test/MC/AArch64/ |
D | tls-relocs.s | 212 ldrsb x29, [x28, #:dtprel_lo12_nc:var] 541 ldrsb x29, [x28, #:tprel_lo12_nc:var]
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D | basic-a64-diagnostics.s | 1935 ldrsb x2, [x3], #256 1936 ldrsb x22, [x13], #-257 1960 ldrsb w2, [x3], #256 1961 ldrsb w22, [x13], #-257 2118 ldrsb x2, [x3, #256]! 2119 ldrsb x22, [x13, #-257]! 2143 ldrsb w2, [x3, #256]! 2144 ldrsb w22, [x13, #-257]! 2384 ldrsb w9, [x4, x2, lsl #-1]
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D | basic-a64-instructions.s | 2396 ldrsb w27, [sp, #4095] 2397 ldrsb xzr, [x15] 2495 ldrsb w10, [x30, x7] 2499 ldrsb w15, [x25, w7, uxtw #0] 2501 ldrsb x18, [x22, w10, sxtw #0] 2670 ldrsb xzr, [x9], #255 2671 ldrsb x2, [x3], #1 2672 ldrsb x19, [x12], #-256 2689 ldrsb wzr, [x9], #255 2690 ldrsb w2, [x3], #1 [all …]
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/external/llvm/test/MC/ARM/ |
D | basic-thumb2-instructions.s | 965 ldrsb r5, [r5, #-4] 966 ldrsb r5, [r6, #32] 967 ldrsb r5, [r6, #33] 968 ldrsb r5, [r6, #257] 969 ldrsb.w lr, [r7, #257] 971 @ CHECK: ldrsb r5, [r5, #-4] @ encoding: [0x15,0xf9,0x04,0x5c] 972 @ CHECK: ldrsb.w r5, [r6, #32] @ encoding: [0x96,0xf9,0x20,0x50] 973 @ CHECK: ldrsb.w r5, [r6, #33] @ encoding: [0x96,0xf9,0x21,0x50] 974 @ CHECK: ldrsb.w r5, [r6, #257] @ encoding: [0x96,0xf9,0x01,0x51] 975 @ CHECK: ldrsb.w lr, [r7, #257] @ encoding: [0x97,0xf9,0x01,0xe1] [all …]
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D | basic-thumb-instructions.s | 316 ldrsb r6, [r2, r6] 319 @ CHECK: ldrsb r6, [r2, r6] @ encoding: [0x96,0x57]
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/external/llvm/test/CodeGen/Thumb2/ |
D | thumb2-ldr_pre.ll | 4 ; RUN: grep "ldrsb.*\!" | count 1
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D | thumb2-ldr_ext.ll | 3 ; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep ldrsb | count 1
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/external/llvm/test/CodeGen/AArch64/ |
D | ldst-unsignedimm.ll | 22 ; CHECK: ldrsb {{w[0-9]+}}, [{{x[0-9]+}}, #:lo12:var_8bit] 40 ; CHECK: ldrsb {{x[0-9]+}}, [{{x[0-9]+}}, #:lo12:var_8bit]
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D | ldst-regoffset.ll | 18 ; CHECK: ldrsb {{w[0-9]+}}, [{{x[0-9]+}}, {{w[0-9]+}}, sxtw]
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/external/libvpx/libvpx/vp8/encoder/arm/armv5te/ |
D | vp8_packtokens_armv5.asm | 98 ldrsb lr, [r10, lr] ; i = vp8_coef_tree[i+bb] 199 ldrsb lr, [r10, lr] ; i = b->tree[i+bb]
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D | vp8_packtokens_mbrow_armv5.asm | 119 ldrsb lr, [r10, lr] ; i = vp8_coef_tree[i+bb] 220 ldrsb lr, [r10, lr] ; i = b->tree[i+bb]
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D | vp8_packtokens_partitions_armv5.asm | 148 ldrsb lr, [r10, lr] ; i = vp8_coef_tree[i+bb] 249 ldrsb lr, [r10, lr] ; i = b->tree[i+bb]
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | basic-a64-instructions.txt | 1999 # CHECK: ldrsb xzr, [x9], #255 2000 # CHECK: ldrsb x2, [x3], #1 2001 # CHECK: ldrsb x19, [x12], #-256 2018 # CHECK: ldrsb wzr, [x9], #255 2019 # CHECK: ldrsb w2, [x3], #1 2020 # CHECK: ldrsb w19, [x12], #-256 2157 # CHECK: ldrsb xzr, [x9, #255]! 2158 # CHECK: ldrsb x2, [x3, #1]! 2159 # CHECK: ldrsb x19, [x12, #-256]! 2176 # CHECK: ldrsb wzr, [x9, #255]! [all …]
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 1219 defm t2LDRSB : T2I_ld<1, 0b00, "ldrsb", IIC_iLoad_bh_i, IIC_iLoad_bh_si, 1317 "ldrsb", "\t$Rt, $addr!", "$addr.base = $Rn_wb", 1324 "ldrsb", "\t$Rt, $Rn$offset", "$Rn = $Rn_wb", []>; 4075 def : t2InstAlias<"ldrsb${p} $Rt, $addr", 4086 def : t2InstAlias<"ldrsb${p} $Rt, $addr", 4097 def : t2InstAlias<"ldrsb${p} $Rt, $addr", 4310 def t2LDRSBpcrel : t2AsmPseudo<"ldrsb${p} $Rt, $addr", 4321 def : t2InstAlias<"ldrsb${p}.w $Rt, $addr",
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/external/v8/src/arm/ |
D | assembler-arm.h | 927 void ldrsb(Register dst, const MemOperand& src, Condition cond = al);
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/external/v8/test/cctest/ |
D | test-assembler-arm.cc | 188 __ ldrsb(r2, MemOperand(r4, OFFSET_OF(T, c)));
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