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/external/llvm/test/CodeGen/Mips/
Dbiggot.ll9 ; O32: lui $[[R0:[0-9]+]], %got_hi(v0)
12 ; O32: lui $[[R2:[0-9]+]], %call_hi(foo0)
16 ; N64: lui $[[R0:[0-9]+]], %got_hi(v0)
19 ; N64: lui $[[R2:[0-9]+]], %call_hi(foo0)
35 ; O32: lui $[[R2:[0-9]+]], %call_hi(memcpy)
40 ; N64: lui $[[R2:[0-9]+]], %call_hi(memcpy)
Dmips64imm.ll6 ; CHECK: lui ${{[0-9]+}}, 4660
14 ; CHECK: lui $[[R0:[0-9]+]], 4660
36 ; CHECK: lui $[[R0:[0-9]+]], 583
48 ; CHECK: lui $[[R0:[0-9]+]], 34661
Dremat-immed-load.ll30 ; 32: lui $4, 1
31 ; 32: lui $4, 1
42 ; 64: lui $4, 1
43 ; 64: lui $4, 1
Dfcopysign.ll9 ; 32: lui $[[MSK1:[0-9]+]], 32768
11 ; 32: lui $[[T0:[0-9]+]], 32767
42 ; 32: lui $[[MSK1:[0-9]+]], 32768
44 ; 32: lui $[[T0:[0-9]+]], 32767
Dtls.ll24 ; STATIC: lui $[[R0:[0-9]+]], %tprel_hi(t1)
47 ; STATICGP: lui $[[R0:[0-9]+]], %hi(__gnu_local_gp)
50 ; STATIC: lui $[[R0:[0-9]+]], %hi(__gnu_local_gp)
66 ; PIC: lui $[[R0:[0-9]+]], %dtprel_hi(f3.i)
Dglobal-address.ll16 ; STATIC-O32: lui $[[R1:[0-9]+]], %hi(s1)
18 ; STATIC-O32: lui $[[R2:[0-9]+]], %hi(g1)
24 ; STATIC-N32: lui $[[R1:[0-9]+]], %hi(s1)
26 ; STATIC-N32: lui $[[R2:[0-9]+]], %hi(g1)
Dlargeimmprinting.ll11 ; 32: lui $[[R0:[0-9]+]], 65535
14 ; 32: lui $[[R1:[0-9]+]], 1
23 ; 64: lui $[[R1:[0-9]+]], 1
Dlargeimm1.ll3 ; CHECK: lui ${{[0-9]+}}, 49152
4 ; CHECK: lui ${{[0-9]+}}, 16384
Dblockaddr.ll19 ; STATIC-O32: lui $[[R2:[0-9]+]], %hi($tmp[[T2:[0-9]+]])
21 ; STATIC-O32: lui $[[R3:[0-9]+]], %hi($tmp[[T3:[0-9]+]])
27 ; STATIC-N32: lui $[[R2:[0-9]+]], %hi($tmp[[T2:[0-9]+]])
29 ; STATIC-N32: lui $[[R3:[0-9]+]], %hi($tmp[[T3:[0-9]+]])
Dimm.ll6 ; CHECK: lui $[[R0:[0-9]+]], 4660
14 ; CHECK: lui ${{[0-9]+}}, 4660
Dlongbranch.ll9 ; O32: lui $1, 0
11 ; N64: lui $1, 0
D2009-11-16-CstPoolLoad.ll12 ; STATIC-O32: lui $[[R0:[0-9]+]], %hi($CPI0_0)
16 ; STATIC-N32: lui $[[R0:[0-9]+]], %hi($CPI0_0)
Dfabs.ll10 ; 32: lui $[[T0:[0-9]+]], 32767
29 ; 32: lui $[[T0:[0-9]+]], 32767
Deh-dwarf-cfa.ll26 ; CHECK: lui $[[R0:[a-z0-9]+]], 65535
31 ; CHECK: lui $[[R1:[a-z0-9]+]], 1
Daddc.ll6 ; CHECK: lui
D2008-08-03-fabs64.ll2 ; DISABLED: grep {lui.*32767} %t | count 1
Dglobal-pointer-reg.ll13 ; CHECK: lui $[[R0:[0-9]+]], %hi(_gp_disp)
/external/llvm/test/MC/Mips/
Dmips-relocations.s5 # CHECK: lui $2, %hi(_gp_disp) # encoding: [A,A,0x02,0x3c]
13 # CHECK: lui $2, %dtprel_hi(_gp_disp) # encoding: [A,A,0x02,0x3c]
25 # CHECK: lui $2, %tprel_hi(_gp_disp) # encoding: [A,A,0x02,0x3c]
30 lui $2, %hi(_gp_disp)
34 lui $2, %dtprel_hi(_gp_disp)
40 lui $2, %tprel_hi(_gp_disp)
Dmips-expansions.s10 # CHECK: lui $7, 1 # encoding: [0x01,0x00,0x07,0x3c]
13 # CHECK: lui $7, 1 # encoding: [0x01,0x00,0x07,0x3c]
16 # CHECK: lui $7, 1 # encoding: [0x01,0x00,0x07,0x3c]
Dhilo-addressing.s6 lui $4,%hi(addr)
/external/llvm/test/MC/Disassembler/Mips/
Dmips64_le.txt51 # CHECK: lui $1, 1
57 # CHECK: lui $ra, 1
Dmips64.txt51 # CHECK: lui $1, 1
57 # CHECK: lui $ra, 1
Dmips64r2.txt51 # CHECK: lui $1, 1
57 # CHECK: lui $ra, 1
Dmips64r2_le.txt51 # CHECK: lui $1, 1
57 # CHECK: lui $ra, 1
/external/webkit/Source/JavaScriptCore/assembler/
DMacroAssemblerMIPS.h161 m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16); in add32()
202 m_assembler.lui(addrTempRegister, (dest.offset + 0x8000) >> 16); in add32()
392 m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16); in sub32()
478 m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16); in load8()
495 m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16); in load32()
523 m_assembler.lui(immTempRegister, (address.offset + 0x8000) >> 16); in load32()
570 m_assembler.lui(immTempRegister, address.offset >> 16); in load32WithUnalignedHalfWords()
623 m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16); in load16()
652 m_assembler.lui(immTempRegister, (address.offset + 0x8000) >> 16); in load16()
687 m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16); in store32()
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