| /external/valgrind/main/none/tests/mips32/ |
| D | MoveIns.stdout.exp-BE | 2 mfc1 $t1, $f0 :: fs 4.676074, rt 0x4095a266
3 mfc1 $t2, $f1 :: fs 272008302207532160516096.000000, rt 0x66666666
4 mfc1 $t3, $f2 :: fs -1.875000, rt 0xbff00000
5 mfc1 $t4, $f3 :: fs 0.000000, rt 0x0
6 mfc1 $t5, $f4 :: fs 1.875000, rt 0x3ff00000
7 mfc1 $t6, $f5 :: fs 0.000000, rt 0x0
8 mfc1 $t7, $f6 :: fs 0.000000, rt 0x252a2e2b
9 mfc1 $v0, $f7 :: fs 0.000000, rt 0x262d2d2a
10 mfc1 $v1, $f8 :: fs nan, rt 0xffffffff
11 mfc1 $s0, $f9 :: fs nan, rt 0xffffffff
[all …]
|
| D | MoveIns.stdout.exp | 2 mfc1 $t1, $f0 :: fs 4.676074, rt 0x4095a266
3 mfc1 $t2, $f1 :: fs 272008302207532160516096.000000, rt 0x66666666
4 mfc1 $t3, $f2 :: fs -1.875000, rt 0xbff00000
5 mfc1 $t4, $f3 :: fs 0.000000, rt 0x0
6 mfc1 $t5, $f4 :: fs 1.875000, rt 0x3ff00000
7 mfc1 $t6, $f5 :: fs 0.000000, rt 0x0
8 mfc1 $t7, $f6 :: fs 0.000000, rt 0x252a2e2b
9 mfc1 $v0, $f7 :: fs 0.000000, rt 0x262d2d2a
10 mfc1 $v1, $f8 :: fs nan, rt 0xffffffff
11 mfc1 $s0, $f9 :: fs nan, rt 0xffffffff
[all …]
|
| /external/llvm/test/CodeGen/Mips/ |
| D | buildpairextractelementf64.ll | 16 ; CHECK: mfc1
17 ; CHECK: mfc1
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| D | 2008-08-04-Bitconvert.ll | 12 ; CHECK: mfc1
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| D | o32_cc_byval.ll | 61 ; CHECK: mfc1 $6, $f[[F0]]
|
| /external/v8/test/cctest/ |
| D | test-assembler-mips.cc | 367 __ mfc1(t0, f4); in TEST() local
368 __ mfc1(t1, f5); in TEST() local
369 __ mfc1(t2, f6); in TEST() local
370 __ mfc1(t3, f7); in TEST() local
432 __ mfc1(t2, f8); in TEST() local
437 __ mfc1(t3, f10); in TEST() local
789 __ mfc1(t0, f0); in TEST() local
790 __ mfc1(t1, f1); in TEST() local
796 __ mfc1(t0, f0); // f0 has LS 32 bits of long. in TEST() local
797 __ mfc1(t1, f1); // f1 has MS 32 bits of long. in TEST() local
|
| /external/llvm/test/MC/Mips/ |
| D | mips-fpu-instructions.s | 143 # CHECK: mfc1 $6, $f7 # encoding: [0x00,0x38,0x06,0x44]
162 mfc1 $a2,$f7
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| /external/v8/src/mips/ |
| D | macro-assembler-mips.cc | 978 mfc1(t8, fs); in Cvt_d_uw()
1030 mfc1(t8, FPURegister::from_code(fs.code() + 1)); in Trunc_w_d()
1040 mfc1(t8, FPURegister::from_code(fs.code() + 1)); in Round_w_d()
1051 mfc1(t8, FPURegister::from_code(fs.code() + 1)); in Floor_w_d()
1062 mfc1(t8, FPURegister::from_code(fs.code() + 1)); in Ceil_w_d()
1090 mfc1(rs, scratch); in Trunc_uw_d()
1098 mfc1(rs, scratch); in Trunc_uw_d()
1355 mfc1(dest, double_scratch); in ConvertToInt32()
1548 mfc1(result, single_scratch); in EmitECMATruncate()
5361 mfc1(result_reg, temp_double_reg); in ClampDoubleToUint8()
|
| D | lithium-codegen-mips.cc | 3023 __ mfc1(result, single_scratch); in DoMathFloor() local
3029 __ mfc1(scratch1, input.high()); in DoMathFloor() local
3044 __ mfc1(result, input.high()); in DoMathRound() local
3074 __ mfc1(result, double_scratch0().high()); in DoMathRound() local
3100 __ mfc1(result, double_scratch0().low()); in DoMathRound() local
3106 __ mfc1(scratch, input.high()); in DoMathRound() local
3981 __ mfc1(at, result_reg.low()); in EmitNumberUntagD() local
3983 __ mfc1(scratch, result_reg.high()); in EmitNumberUntagD() local
4063 __ mfc1(input_reg, single_scratch); in DoDeferredTaggedToI() local
4068 __ mfc1(scratch1, double_scratch.high()); in DoDeferredTaggedToI() local
[all …]
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| D | macro-assembler-mips.h | 240 mfc1(dst_low, src); in Move()
241 mfc1(dst_high, FPURegister::from_code(src.code() + 1)); in Move()
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| D | assembler-mips.h | 801 void mfc1(Register rt, FPURegister fs);
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| D | code-stubs-mips.cc | 881 __ mfc1(dst, single_scratch); in LoadNumberAsInt32() local
2943 __ mfc1(scratch1, single_scratch); in GenerateInt32Stub() local
2950 __ mfc1(scratch2, f11); in GenerateInt32Stub() local
3710 __ mfc1(scratch, single_scratch); in Generate() local
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| D | assembler-mips.cc | 1657 void Assembler::mfc1(Register rt, FPURegister fs) { in mfc1() function in v8::internal::Assembler
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| D | stub-cache-mips.cc | 2101 __ mfc1(v0, f0); in CompileMathFloorCall() local
|
| /external/llvm/test/MC/Disassembler/Mips/ |
| D | mips32r2.txt | 258 # CHECK: mfc1 $6, $f7
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| D | mips32_le.txt | 249 # CHECK: mfc1 $6, $f7
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| D | mips32r2_le.txt | 258 # CHECK: mfc1 $6, $f7
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| D | mips32.txt | 249 # CHECK: mfc1 $6, $f7
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsInstrFPU.td | 280 def MFC1 : MFC1_FT<"mfc1", CPURegs, FGR32, IIFmove, bitconvert>, MFC1_FM<0>;
459 // This pseudo instr gets expanded into 2 mfc1 instrs after register
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| /external/webkit/Source/JavaScriptCore/assembler/ |
| D | MIPSAssembler.h | 576 void mfc1(RegisterID rt, FPRegisterID fs) in mfc1() function
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| D | MacroAssemblerMIPS.h | 1781 m_assembler.mfc1(dest, fpTempRegister); in branchTruncateDoubleToInt32()
1792 m_assembler.mfc1(dest, fpTempRegister); in branchConvertDoubleToInt32()
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| /external/webkit/Source/JavaScriptCore/ |
| D | ChangeLog-2010-05-24 | 6795 (JSC::MIPSAssembler::mfc1):
|