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Searched refs:op1 (Results 1 – 25 of 85) sorted by relevance

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/external/valgrind/main/none/tests/s390x/
Dcds.c15 quad_word op1 = op1_init; in test() local
19 quad_word op1_before = op1; in test()
23 printf("before op1 = (%#lx, %#lx)\n", op1.high, op1.low); in test()
35 : "=d" (cc), "+QS" (op1), "+QS" (op2), "+QS" (op3) in test()
39 printf("after op1 = (%#lx, %#lx)\n", op1.high, op1.low); in test()
58 if (op1.low != op1_before.low || op1.high != op1_before.high) { in test()
79 if ((op1.high >> 32) != (op1_before.high >> 32) || in test()
80 (op1.low >> 32) != (op1_before.low >> 32)) { in test()
84 if ((op1.low & 0xffffffff) != (op2 & 0xffffffff)) { in test()
87 if ((op1.high & 0xffffffff) != (op2 >> 32)) { in test()
[all …]
Dcdsg.c84 quad_word op1, op2, op3; in main() local
87 op1.high = 0x0011223344556677ull; in main()
88 op1.low = 0x8899aabbccddeeffull; in main()
89 op2 = op1; in main()
91 test(op1, op2, op3, 0); in main()
94 op1.high = 0x8000000000000000ull; in main()
95 op1.low = 0x0000000000000000ull; in main()
99 test(op1, op2, op3, 1); in main()
102 op1.high = 0x0000000000000000ull; in main()
103 op1.low = 0x0000000000000001ull; in main()
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Dcdsg.stdout.exp1 before op1 = (0x11223344556677, 0x8899aabbccddeeff)
4 after op1 = (0x11223344556677, 0x8899aabbccddeeff)
8 before op1 = (0x8000000000000000, 0)
11 after op1 = (0, 0x1)
15 before op1 = (0, 0x1)
18 after op1 = (0x1, 0)
Dcs.c8 register int32_t op1 asm("8") = op1_init; in test()
14 printf("before op1 = %#x\n", op1); in test()
22 : "=d" (cc), "+Q" (op2), "+d"(op1), "+d"(op3) in test()
26 printf("after op1 = %#x\n", op1); in test()
39 if (op1 != op2) { in test()
Dcsg.c8 register int64_t op1 asm("8") = op1_init; in test()
14 printf("before op1 = %#lx\n", op1); in test()
22 : "=d" (cc), "+Q" (op2), "+d"(op1), "+d"(op3) in test()
26 printf("after op1 = %#lx\n", op1); in test()
39 if (op1 != op2) { in test()
Dcsg.stdout.exp1 before op1 = 0x1000000000000000
4 after op1 = 0x1000000000000000
8 before op1 = 0x1000000000000000
11 after op1 = 0x2000000000000000
Dcs.stdout.exp1 before op1 = 0x10000000
4 after op1 = 0x10000000
8 before op1 = 0x10000000
11 after op1 = 0x20000000
Dcds.stdout.exp1 before op1 = (0x44556677, 0x111111118899aabb)
4 after op1 = (0x44556677, 0x111111118899aabb)
8 before op1 = (0x1000000000000000, 0)
11 after op1 = (0x1000000080000000, 0x1)
Dopcodes.h19 #define RIL_RI(op1,r1,op2,i2) \ argument
20 ".short 0x" #op1 #r1 #op2 "\n\t" \
22 #define RIE_RRI0(op1,r1,r3,i2,u0,op2) \ argument
23 ".short 0x" #op1 #r1 #r3 "\n\t" \
26 #define SIY_IRD(op1,i2,b1,dl1,dh1,op2) \ argument
27 ".short 0x" #op1 #i2 "\n\t" \
29 #define RXY_RRRD(op1,r1,x2,b2,dl2,dh2,op2) \ argument
30 ".short 0x" #op1 #r1 #x2 "\n\t" \
32 #define RIL_RU(op1,r1,op2,i2) \ argument
33 ".short 0x" #op1 #r1 #op2 "\n\t" \
[all …]
/external/webkit/Source/JavaScriptCore/jit/
DJITArithmetic32_64.cpp89 unsigned op1 = currentInstruction[1].u.operand; in emit_op_jnless() local
97 if (isOperandConstantImmediateChar(op1)) { in emit_op_jnless()
103 …addJump(branch32(LessThanOrEqual, regT0, Imm32(asString(getConstantOperand(op1))->tryGetValue()[0]… in emit_op_jnless()
107 emitLoad(op1, regT1, regT0); in emit_op_jnless()
115 if (isOperandConstantImmediateInt(op1)) { in emit_op_jnless()
119 addJump(branch32(LessThanOrEqual, regT2, Imm32(getConstantOperand(op1).asInt32())), target); in emit_op_jnless()
121 emitLoad(op1, regT1, regT0); in emit_op_jnless()
125 emitLoad2(op1, regT1, regT0, op2, regT3, regT2); in emit_op_jnless()
139 …nless, target, op1, op2, OperandTypes(), notInt32Op1, notInt32Op2, !isOperandConstantImmediateInt(… in emit_op_jnless()
145 unsigned op1 = currentInstruction[1].u.operand; in emitSlow_op_jnless() local
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DJITArithmetic.cpp53 unsigned op1 = currentInstruction[2].u.operand; in emit_op_lshift() local
56 emitGetVirtualRegisters(op1, regT0, op2, regT2); in emit_op_lshift()
70 unsigned op1 = currentInstruction[2].u.operand; in emitSlow_op_lshift() local
73 UNUSED_PARAM(op1); in emitSlow_op_lshift()
86 unsigned op1 = currentInstruction[2].u.operand; in emit_op_rshift() local
91 emitGetVirtualRegister(op1, regT0); in emit_op_rshift()
96 emitGetVirtualRegisters(op1, regT0, op2, regT2); in emit_op_rshift()
121 unsigned op1 = currentInstruction[2].u.operand; in emitSlow_op_rshift() local
138 stubCall.addArgument(op1, regT0); in emitSlow_op_rshift()
154 unsigned op1 = currentInstruction[2].u.operand; in emit_op_urshift() local
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/external/valgrind/main/memcheck/tests/s390x/
Dcds.c13 quad_word op1 = op1_init; in test() local
23 : "=d" (cc), "+QS" (op1), "+QS" (op2), "+QS" (op3) in test()
43 quad_word op1, op3; in op1_undefined() local
47 op1 = make_undefined(); in op1_undefined()
50 test(op1, op2, op3); // complaint in op1_undefined()
55 quad_word op1, op3; in op2_undefined() local
58 op1.high = op1.low = 42; in op2_undefined()
61 test(op1, op2, op3); // complaint in op2_undefined()
66 quad_word op1, op3; in op3_undefined() local
69 op1.high = op1.low = 42; in op3_undefined()
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Dcdsg.c34 quad_word op1, op2, op3; in op1_undefined() local
39 test(op1, op2, op3); // complaint in op1_undefined()
44 quad_word op1, op2, op3; in op2_undefined() local
46 op1.high = op1.low = 42; in op2_undefined()
49 test(op1, op2, op3); // complaint in op2_undefined()
54 quad_word op1, op2, op3; in op3_undefined() local
56 op1.high = op1.low = 42; in op3_undefined()
57 op2 = op1; in op3_undefined()
59 test(op1, op2, op3); // no complaint; op3 is just copied around in op3_undefined()
Dcs.c8 register int32_t op1 asm("8") = op1_init; in test()
18 : "=d" (cc), "+Q" (op2), "+d"(op1), "+d"(op3) in test()
25 int op1, op2, op3; in main() local
27 test(op1, 0x10000000, 0x12345678); // complaint in main()
Dcsg.c8 register int64_t op1 asm("8") = op1_init; in test()
18 : "=d" (cc), "+Q" (op2), "+d"(op1), "+d"(op3) in test()
25 int64_t op1, op2, op3; in main() local
27 test(op1, 0x1000000000000000ull, 0x1234567887654321ull); // complaint in main()
/external/webkit/Source/JavaScriptCore/dfg/
DDFGSpeculativeJIT.cpp279 SpeculateIntegerOperand op1(this, node.child1); in compile() local
280 GPRTemporary result(this, op1); in compile()
282 bitOp(op, valueOfInt32Constant(node.child2), op1.registerID(), result.registerID()); in compile()
286 SpeculateIntegerOperand op1(this, node.child1); in compile() local
288 GPRTemporary result(this, op1, op2); in compile()
290 MacroAssembler::RegisterID reg1 = op1.registerID(); in compile()
302 SpeculateIntegerOperand op1(this, node.child1); in compile() local
303 GPRTemporary result(this, op1); in compile()
305 … shiftOp(op, op1.registerID(), valueOfInt32Constant(node.child2) & 0x1f, result.registerID()); in compile()
310 SpeculateIntegerOperand op1(this, node.child1); in compile() local
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DDFGNonSpeculativeJIT.cpp226 IntegerOperand op1(this, node.child1); in compile() local
227 GPRTemporary result(this, op1); in compile()
229 bitOp(op, valueOfInt32Constant(node.child2), op1.registerID(), result.registerID()); in compile()
233 IntegerOperand op1(this, node.child1); in compile() local
235 GPRTemporary result(this, op1, op2); in compile()
237 MacroAssembler::RegisterID reg1 = op1.registerID(); in compile()
249 IntegerOperand op1(this, node.child1); in compile() local
250 GPRTemporary result(this, op1); in compile()
255 shiftOp(op, op1.registerID(), shiftAmount, result.registerID()); in compile()
260 IntegerOperand op1(this, node.child1); in compile() local
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DDFGJITCodeGenerator.cpp444 GPRTemporary::GPRTemporary(JITCodeGenerator* jit, SpeculateIntegerOperand& op1) in GPRTemporary() argument
449 op1.gpr(); in GPRTemporary()
450 if (m_jit->canReuse(op1.index())) in GPRTemporary()
451 m_gpr = m_jit->reuse(op1.gpr()); in GPRTemporary()
456 GPRTemporary::GPRTemporary(JITCodeGenerator* jit, SpeculateIntegerOperand& op1, SpeculateIntegerOpe… in GPRTemporary() argument
461 op1.gpr(); in GPRTemporary()
463 if (m_jit->canReuse(op1.index())) in GPRTemporary()
464 m_gpr = m_jit->reuse(op1.gpr()); in GPRTemporary()
471 GPRTemporary::GPRTemporary(JITCodeGenerator* jit, IntegerOperand& op1) in GPRTemporary() argument
476 op1.gpr(); in GPRTemporary()
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DDFGByteCodeParser.cpp567 NodeIndex op1 = getThis(); in parseBlock() local
568 setThis(addToGraph(ConvertThis, op1)); in parseBlock()
575 NodeIndex op1 = getToInt32(currentInstruction[2].u.operand); in parseBlock() local
577 set(currentInstruction[1].u.operand, addToGraph(BitAnd, op1, op2)); in parseBlock()
582 NodeIndex op1 = getToInt32(currentInstruction[2].u.operand); in parseBlock() local
584 set(currentInstruction[1].u.operand, addToGraph(BitOr, op1, op2)); in parseBlock()
589 NodeIndex op1 = getToInt32(currentInstruction[2].u.operand); in parseBlock() local
591 set(currentInstruction[1].u.operand, addToGraph(BitXor, op1, op2)); in parseBlock()
596 NodeIndex op1 = getToInt32(currentInstruction[2].u.operand); in parseBlock() local
601 result = op1; in parseBlock()
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/external/valgrind/main/none/tests/mips32/
Dround.c201 int FCSRRoundingMode(flt_round_op_t op1) in FCSRRoundingMode() argument
215 switch(op1) { in FCSRRoundingMode()
218 printf("%s %lf %lf\n", flt_round_op_names[op1], fd_d, fs_f[i]); in FCSRRoundingMode()
222 printf("%s %lf %d\n", flt_round_op_names[op1], fd_d, fs_w[i]); in FCSRRoundingMode()
226 printf("%s %f %lf\n", flt_round_op_names[op1], fd_f, fs_d[i]); in FCSRRoundingMode()
230 printf("%s %f %d\n", flt_round_op_names[op1], fd_f, fs_w[i]); in FCSRRoundingMode()
234 printf("%s %d %f\n", flt_round_op_names[op1], fd_w, fs_f[i]); in FCSRRoundingMode()
238 printf("%s %d %lf\n", flt_round_op_names[op1], fd_w, fs_d[i]); in FCSRRoundingMode()
252 flt_round_op_t op1; in main() local
262 for (op1 = CVTDS; op1 <= CVTWD; op1++) { in main()
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/external/valgrind/main/VEX/priv/
Dguest_s390_toIR.c166 binop(IROp kind, IRExpr *op1, IRExpr *op2) in binop() argument
168 return IRExpr_Binop(kind, op1, op2); in binop()
173 triop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3) in triop() argument
175 return IRExpr_Triop(kind, op1, op2, op3); in triop()
180 qop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3, IRExpr *op4) in qop() argument
182 return IRExpr_Qop(kind, op1, op2, op3, op4); in qop()
695 s390_call_calculate_icc(UInt m, UInt opc, IRTemp op1, IRTemp op2) in s390_call_calculate_icc() argument
701 dep1 = s390_cc_widen(op1, True); in s390_call_calculate_icc()
706 dep1 = s390_cc_widen(op1, False); in s390_call_calculate_icc()
2179 IRTemp op1 = newTemp(Ity_I32); in s390_irgen_AR() local
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/external/valgrind/main/VEX/test/
Dtest-amd64-muldiv.h2 void glue(glue(test_, OP), b)(int64 op0, int64 op1) in glue()
6 s1 = op1; in glue()
20 void glue(glue(test_, OP), w)(int64 op0h, int64 op0, int64 op1) in glue()
23 s1 = op1; in glue()
38 void glue(glue(test_, OP), l)(int64 op0h, int64 op0, int64 op1) in glue()
41 s1 = op1; in glue()
56 void glue(glue(test_, OP), q)(int64 op0h, int64 op0, int64 op1) in glue()
59 s1 = op1; in glue()
Dtest-i386-muldiv.h2 void glue(glue(test_, OP), b)(int op0, int op1) in glue()
6 s1 = op1; in glue()
20 void glue(glue(test_, OP), w)(int op0h, int op0, int op1) in glue()
23 s1 = op1; in glue()
38 void glue(glue(test_, OP), l)(int op0h, int op0, int op1) in glue()
41 s1 = op1; in glue()
Dtest-amd64.c368 void test_imulw2(int64 op0, int64 op1) in test_imulw2() argument
372 s1 = op1; in test_imulw2()
386 void test_imull2(int64 op0, int64 op1) in test_imull2() argument
391 s1 = op1; in test_imull2()
405 #define TEST_IMUL_IM(size, size1, op0, op1)\ argument
416 : "r" (op1), "1" (flags), "0" (res));\
418 "imul" size, op0, op1, res, flags & CC_MASK);\
421 #define TEST_IMUL_IM_L(op0, op1)\ argument
432 : "r" (op1), "1" (flags), "0" (res));\
434 "imull", op0, op1, res, flags & CC_MASK);\
[all …]
/external/llvm/test/Bitcode/
Dfunction-encoding-rel-operands.ll6 ; CHECK: INST_BINOP {{.*}}op0=1 op1=1
7 ; CHECK: INST_BINOP {{.*}}op0=1 op1=1
8 ; CHECK: INST_BINOP {{.*}}op0=1 op1=1
21 ; CHECK: INST_BINOP {{.*}}op0=1 op1=1
22 ; CHECK: INST_BINOP {{.*}}op0=1 op1=1
23 ; CHECK: INST_BINOP {{.*}}op0=1 op1=1
24 ; CHECK: INST_BINOP {{.*}}op0=1 op1=1

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