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Searched refs:r11 (Results 1 – 25 of 258) sorted by relevance

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/external/libvpx/libvpx/vp8/common/arm/armv6/
Dfilter_v6.asm32 stmdb sp!, {r4 - r11, lr}
34 ldr r11, [sp, #40] ; vp8_filter address
45 ldr r4, [r11] ; load up packed filter coefficients
46 ldr r5, [r11, #4]
47 ldr r6, [r11, #8]
60 ldrb r11, [r0, #-1]
68 pkhbt r10, r10, r11, lsl #16 ; r11 | r10
70 pkhbt r11, r11, r9, lsl #16 ; r9 | r11
74 smlad r8, r11, r5, r8
75 ldrb r11, [r0, #2]
[all …]
Dloopfilter_v6.asm64 stmdb sp!, {r4 - r11, lr}
75 ldr r11, [src], pstep ; p1
92 uqsub8 r8, r10, r11 ; p2 - p1
93 uqsub8 r10, r11, r10 ; p1 - p2
99 uqsub8 r6, r11, r12 ; p1 - p0
101 uqsub8 r7, r12, r11 ; p0 - p1
109 uqsub8 r6, r11, r10 ; p1 - q1
110 uqsub8 r7, r10, r11 ; q1 - p1
111 uqsub8 r11, r12, r9 ; p0 - q0
115 orr r12, r11, r12 ; abs (p0-q0)
[all …]
Dbilinearfilter_v6.asm27 stmdb sp!, {r4 - r11, lr}
29 ldr r11, [sp, #40] ; vp8_filter address
39 ldr r5, [r11] ; load up filter coefficients
44 mov r11, r1 ; save dst_ptr for each row
102 add r11, r11, #2 ; move over to next column
103 mov r1, r11
107 ldmia sp!, {r4 - r11, pc}
130 add r11, r11, #2 ; move over to next column
131 mov r1, r11
135 ldmia sp!, {r4 - r11, pc}
[all …]
Ddequant_idct_v6.asm21 stmdb sp!, {r4-r11, lr}
70 smulwt r11, r3, r12
77 pkhbt r9, r9, r11, lsl #16
78 ldr r11, [r0], #4
83 uadd16 r10, r11, r14
84 usub16 r8, r11, r14
107 pkhbt r11, r8, r6, lsl #16
113 uadd16 r10, r11, lr
114 usub16 lr, r11, lr
119 smulwt r11, r4, r8
[all …]
/external/openssl/crypto/bn/asm/
Dx86_64-mont.S26 movq %rsp,%r11
31 movq %r11,8(%rsp,%r9,8)
47 movq %rdx,%r11
63 addq %r11,%r13
64 movq %r10,%r11
71 addq %rax,%r11
84 addq %r11,%r13
88 movq %r10,%r11
91 addq %r11,%r13
110 movq %rdx,%r11
[all …]
Dx86_64-mont5.S24 leaq 2(%r9),%r11
25 negq %r11
26 leaq (%rsp,%r11,8),%rsp
32 movq %r10,%r11
34 andq $7,%r11
38 leaq 96(%r12,%r11,8),%r12
82 movq %rdx,%r11
102 addq %r11,%r13
103 movq %r10,%r11
110 addq %rax,%r11
[all …]
/external/tremolo/Tremolo/
DmdctARM.s186 STMFD r13!,{r4,r6-r11,r14}
196 LDR r11,[r9],#4 @ r11= *wL++
201 SMULL r14,r11,r12,r11 @ (r14,r11) = *l * *wL++
203 ADD r6, r6, r11
214 LDMFD r13!,{r4,r6-r11,PC}
225 STMFD r13!,{r4,r6-r11,r14}
235 LDR r11,[r9],#4 @ r11= *wL++
240 SMULL r14,r11,r12,r11 @ (r14,r11) = *l * *wL++
242 SUB r6, r6, r11
253 LDMFD r13!,{r4,r6-r11,PC}
[all …]
DmdctLARM.s186 STMFD r13!,{r4,r6-r11,r14}
198 LDRB r11,[r9],#1 @ r11= *wL++
202 MUL r11,r12,r11 @ r11 = *l * *wL++
204 MLA r6, r7, r6, r11 @ r6 = *--r * *--wR
215 LDMFD r13!,{r4,r6-r11,PC}
226 STMFD r13!,{r4,r6-r11,r14}
237 LDRB r11,[r9],#1 @ r11= *wL++
242 MUL r11,r12,r11 @ (r14,r11) = *l * *wL++
245 SUB r6, r6, r11
256 LDMFD r13!,{r4,r6-r11,PC}
[all …]
DbitwiseARM.s45 STMFD r13!,{r10,r11,r14}
56 LDRLT r11,[r3,#4]! @ r11= ptr[1]
60 ORRLT r10,r10,r11,LSL r14 @ r10= Next 32 bits.
64 LDMFD r13!,{r10,r11,PC}
80 MOV r11,#1
83 RSB r11,r11,r11,LSL r5 @ r11= mask
84 AND r10,r10,r11 @ r10= first r5 bits
88 LDR r11,[r0,#12] @ r11= head = b->head
92 LDR r11,[r11,#12] @ r11= head = head->next
95 CMP r11,#0
[all …]
/external/llvm/test/MC/X86/
Dx86_64-bmi-encoding.s9 blsmskq %r11, %r10
25 blsiq %r11, %r10
41 blsrq %r11, %r10
57 andnq (%rax), %r11, %r10
73 bextrq %r12, %r11, %r10
89 bzhiq %r12, %r11, %r10
101 pextq %r12, %r11, %r10
105 pextq (%rax), %r11, %r10
117 pdepq %r12, %r11, %r10
121 pdepq (%rax), %r11, %r10
[all …]
/external/openssl/crypto/sha/asm/
Dsha1-armv4-large.S24 ldrb r11,[r1,#1]
29 orr r9,r9,r11,lsl#16
49 ldrb r11,[r1,#1]
54 orr r9,r9,r11,lsl#16
74 ldrb r11,[r1,#1]
79 orr r9,r9,r11,lsl#16
99 ldrb r11,[r1,#1]
104 orr r9,r9,r11,lsl#16
124 ldrb r11,[r1,#1]
129 orr r9,r9,r11,lsl#16
[all …]
Dsha512-x86_64.S13 movq %rsp,%r11
21 movq %r11,128+24(%rsp)
33 movq 56(%rdi),%r11
52 addq %r11,%r12
57 movq %rbx,%r11
63 xorq %rcx,%r11
69 andq %rax,%r11
74 addq %r15,%r11
77 addq %r12,%r11
79 addq %r14,%r11
[all …]
/external/openssl/crypto/modes/asm/
Dghash-armv4.S28 stmdb sp!,{r3-r11,lr} @ save r3/end too
31 ldmia r12,{r4-r11} @ copy rem_4bit ...
32 stmdb sp!,{r4-r11} @ ... to stack
44 add r11,r1,r14
48 ldmia r11,{r8-r11} @ load Htbl[nhi]
58 eor r7,r11,r7,lsr#4
65 add r11,r1,r12,lsl#4
69 ldmia r11,{r8-r11} @ load Htbl[nlo]
78 eor r7,r11,r7,lsr#4
80 add r11,r1,r14
[all …]
/external/valgrind/main/coregrind/m_syswrap/
Dsyscall-amd64-darwin.S117 movq -16(%rbp), %r11 /* r11 = VexGuestAMD64State * */
118 movq OFFSET_amd64_RDI(%r11), %rdi
119 movq OFFSET_amd64_RSI(%r11), %rsi
120 movq OFFSET_amd64_RDX(%r11), %rdx
121 movq OFFSET_amd64_RCX(%r11), %r10 /* rcx is passed in r10 instead */
122 movq OFFSET_amd64_R8(%r11), %r8
123 movq OFFSET_amd64_R9(%r11), %r9
125 movq OFFSET_amd64_RSP(%r11), %r11 /* r11 = simulated RSP */
126 movq 16(%r11), %rax
128 movq 8(%r11), %rax
[all …]
/external/libvpx/libvpx/vpx_scale/arm/neon/
Dvp8_vpxyv12_copyframe_func_neon.asm25 push {r4 - r11, lr}
34 ldr r11, [r1, #yv12_buffer_config_v_buffer] ;srcptr1
46 str r11, [sp, #12]
55 add r11, r3, r7
72 vst1.8 {q8, q9}, [r11]!
74 vst1.8 {q10, q11}, [r11]!
76 vst1.8 {q12, q13}, [r11]!
78 vst1.8 {q14, q15}, [r11]!
90 sub r11, r5, r10
115 add r11, r3, r7
[all …]
Dvp8_vpxyv12_copy_y_neon.asm24 push {r4 - r11, lr}
41 add r11, r3, r7
58 vst1.8 {q8, q9}, [r11]!
60 vst1.8 {q10, q11}, [r11]!
62 vst1.8 {q12, q13}, [r11]!
64 vst1.8 {q14, q15}, [r11]!
76 sub r11, r5, r10
83 pop {r4-r11, pc}
87 add r2, r2, r11
88 add r3, r3, r11
[all …]
Dvp8_vpxyv12_copysrcframe_func_neon.asm27 push {r4 - r11, lr}
39 add r11, r3, r7 ;second row dst
63 vst1.8 {q4, q5}, [r11]!
65 vst1.8 {q6, q7}, [r11]!
67 vst1.8 {q12, q13}, [r11]!
69 vst1.8 {q14, q15}, [r11]!
81 vst1.8 {d1}, [r11]!
92 strb r8, [r11], #1
100 add r11, r11, r7
150 add r11, r3, r7 ;second row dst
[all …]
/external/libvpx/libvpx/vp8/encoder/arm/armv6/
Dvp8_subtract_armv6.asm81 stmfd sp!, {r4-r11}
96 uxtb16 r11, r7, ror #8 ; [p3 | p1] (A)
99 usub16 r7, r10, r11 ; [d3 | d1] (A)
102 ldr r11, [r5, #4] ; upred (B)
111 uxtb16 r9, r11 ; [p2 | p0] (B)
113 uxtb16 r11, r11, ror #8 ; [p3 | p1] (B)
116 usub16 r7, r10, r11 ; [d3 | d1] (B)
141 uxtb16 r11, r7, ror #8 ; [p3 | p1] (A)
144 usub16 r7, r10, r11 ; [d3 | d1] (A)
147 ldr r11, [r5, #4] ; vpred (B)
[all …]
/external/libffi/src/s390/
Dsysv.S52 lr %r11,%r15 # Set up frame pointer
59 l %r7,96(%r11) # Load function address
60 st %r11,0(%r15) # Set up back chain
61 ahi %r11,-48 # Register save area
68 lm %r2,%r6,0(%r11) # Load arguments
69 ld %f0,32(%r11)
70 ld %f2,40(%r11)
75 l %r4,48+56(%r11)
76 lm %r6,%r15,48+24(%r11)
80 l %r4,48+56(%r11)
[all …]
/external/openssl/crypto/aes/asm/
Dvpaes-x86_64.pl78 ## Clobbers %xmm1-%xmm5, %r9, %r10, %r11, %rax
86 mov \$16, %r11
114 movdqa -0x40(%r11,%r10), %xmm1 # .Lk_mc_forward[]
118 movdqa (%r11,%r10), %xmm4 # .Lk_mc_backward[]
124 add \$16, %r11 # next mc
127 and \$0x30, %r11 # ... mod 4
161 movdqa 0x40(%r11,%r10), %xmm1 # .Lk_sr[]
180 mov %rax, %r11
183 shl \$4, %r11
187 xor \$0x30, %r11
[all …]
Daes-armv4.S120 mov r11,r2
221 ldmia r11!,{r4-r7}
223 ldr r12,[r11,#240-16]
274 ldr r7,[r11],#16
278 ldr r4,[r11,#-12]
281 ldr r5,[r11,#-8]
283 ldr r6,[r11,#-4]
336 ldr r7,[r11,#0]
339 ldr r4,[r11,#4]
341 ldr r5,[r11,#8]
[all …]
/external/llvm/test/MC/Disassembler/XCore/
Dxcore.txt9 # CHECK: get r11, id
12 # CHECK: get r11, ed
15 # CHECK: get r11, et
39 # CHECK: get r11, kep
42 # CHECK: get r11, ksp
60 # CHECK: set kep, r11
104 # CHECK: setv res[r9], r11
107 # CHECK: setev res[r10], r11
110 # CHECK: eeu res[r11]
119 # CHECK: dgetreg r11
[all …]
/external/flac/libFLAC/ppc/gas/
Dlpc_asm.s83 li r11,16
84 subf r31,r31,r11 # r31: 4-(data%4)
106 mr r11,r8
107 lvsl v16,0,r11 # v16: history alignment permutation vector
113 lvx v8,0,r11
114 addi r11,r11,-16
115 lvx v9,0,r11
128 addi r11,r11,-16
129 lvx v10,0,r11
142 addi r11,r11,-16
[all …]
/external/flac/libFLAC/ppc/as/
Dlpc_asm.s81 li r11,16
82 subf r31,r31,r11 ; r31: 4-(data%4)
104 mr r11,r8
105 lvsl v16,0,r11 ; v16: history alignment permutation vector
111 lvx v8,0,r11
112 addi r11,r11,-16
113 lvx v9,0,r11
126 addi r11,r11,-16
127 lvx v10,0,r11
140 addi r11,r11,-16
[all …]
/external/webrtc/src/modules/audio_coding/codecs/isac/fix/source/
Dpitch_filter_armv6.S36 push {r4-r11}
71 @ r4, r5, r7, r10, r11: scratch
78 ldr r11, [r3], #4
81 smlad r2, r11, r5, r2
85 ldr r11, [r3], #4
90 smlad r2, r11, r5, r2
103 ldr r11, [sp, #40] @ inputState
104 pld [r11]
108 ldr r4, [r11] @ inputState[0, 1], before shift.
109 strh r7, [r11] @ inputState[0], after shift.
[all …]

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