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Searched refs:ror (Results 1 – 25 of 100) sorted by relevance

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/external/webrtc/src/common_audio/signal_processing/
Dspl_sqrt_floor.s21 cmp r0, r2, ror #2 * 0
22 subhs r0, r0, r2, ror #2 * 0
25 cmp r0, r2, ror #2 * 1
26 subhs r0, r0, r2, ror #2 * 1
29 cmp r0, r2, ror #2 * 2
30 subhs r0, r0, r2, ror #2 * 2
33 cmp r0, r2, ror #2 * 3
34 subhs r0, r0, r2, ror #2 * 3
37 cmp r0, r2, ror #2 * 4
38 subhs r0, r0, r2, ror #2 * 4
[all …]
/external/openssl/crypto/sha/asm/
Dsha1-armv4-large.S17 mov r5,r5,ror#30
18 mov r6,r6,ror#30
19 mov r7,r7,ror#30 @ [6]
25 add r7,r8,r7,ror#2 @ E+=K_00_19
30 add r7,r7,r3,ror#27 @ E+=ROR(A,27)
34 add r7,r8,r7,ror#2 @ E+=K_00_19
36 add r7,r7,r3,ror#27 @ E+=ROR(A,27)
41 and r10,r4,r10,ror#2
43 eor r10,r10,r6,ror#2 @ F_00_19(B,C,D)
50 add r6,r8,r6,ror#2 @ E+=K_00_19
[all …]
Dsha256-armv4.S48 mov r0,r8,ror#6
50 eor r0,r0,r8,ror#11
60 eor r0,r0,r8,ror#25 @ Sigma1(e)
66 mov r11,r4,ror#2
68 eor r11,r11,r4,ror#13
70 eor r11,r11,r4,ror#22 @ Sigma0(a)
92 mov r0,r7,ror#6
94 eor r0,r0,r7,ror#11
104 eor r0,r0,r7,ror#25 @ Sigma1(e)
110 mov r10,r11,ror#2
[all …]
Dsha256-586.pl52 &ror ("ecx",25-11);
55 &ror ("ecx",11-6);
58 &ror ("ecx",6); # Sigma1(e)
71 &ror ("ecx",22-13);
74 &ror ("ecx",13-2);
77 &ror ("ecx",2); # Sigma0(a)
170 &ror ("esi",18-7);
173 &ror ("esi",7);
176 &ror ("edi",19-17);
179 &ror ("edi",17);
/external/llvm/test/MC/ARM/
Dbasic-arm-instructions.s58 adc r4, r5, r6, ror #1
59 adc r4, r5, r6, ror #31
65 adc r6, r7, r8, ror r9
78 adc r4, r5, ror #1
79 adc r4, r5, ror #31
84 adc r6, r7, ror r9
97 @ CHECK: adc r4, r5, r6, ror #1 @ encoding: [0xe6,0x40,0xa5,0xe0]
98 @ CHECK: adc r4, r5, r6, ror #31 @ encoding: [0xe6,0x4f,0xa5,0xe0]
103 @ CHECK: adc r6, r7, r8, ror r9 @ encoding: [0x78,0x69,0xa7,0xe0]
115 @ CHECK: adc r4, r4, r5, ror #1 @ encoding: [0xe5,0x40,0xa4,0xe0]
[all …]
Darm-shift-encoding.s11 ldr r0, [r0, r0, ror #16]
21 @ CHECK: ldr r0, [r0, r0, ror #16] @ encoding: [0x60,0x08,0x90,0xe7]
31 pld [r0, r0, ror #16]
41 @ CHECK: [r0, r0, ror #16] @ encoding: [0x60,0xf8,0xd0,0xf7]
51 str r0, [r0, r0, ror #16]
61 @ CHECK: str r0, [r0, r0, ror #16] @ encoding: [0x60,0x08,0x80,0xe7]
69 ldr r3, [r4], r5, ror #0
89 adc r8, r1, r0, ror #16
99 @ CHECK: adc r8, r1, r0, ror #16 @ encoding: [0x60,0x88,0xa1,0xe0]
109 cmp r8, r1, ror #16
[all …]
Dbasic-thumb2-instructions.s47 adc r0, r1, r3, ror #4
57 @ CHECK: adc.w r0, r1, r3, ror #4 @ encoding: [0x41,0xeb,0x33,0x10]
119 add.w r4, r8, r1, ror #12
127 @ CHECK: add.w r4, r8, r1, ror #12 @ encoding: [0x08,0xeb,0x31,0x34]
165 and.w r9, r12, r1, ror #17
171 @ CHECK: and.w r9, r12, r1, ror #17 @ encoding: [0x0c,0xea,0x71,0x49]
263 bic r5, r6, r8, ror #1
272 bic r12, r6, ror #29
280 @ CHECK: bic.w r5, r6, r8, ror #1 @ encoding: [0x26,0xea,0x78,0x05]
288 @ CHECK: bic.w r12, r12, r6, ror #29 @ encoding: [0x2c,0xea,0x76,0x7c]
[all …]
Ddiagnostics.s284 sxtb r8, r3, ror 24
285 sxtb r8, r3, ror #8 -
286 sxtab r3, r8, r3, ror #(fred - wilma)
287 sxtab r7, r8, r3, ror #25
288 sxtah r9, r3, r3, ror #-8
295 @ CHECK-ERRORS: sxtb r8, r3, ror 24
298 @ CHECK-ERRORS: sxtb r8, r3, ror #8 -
301 @ CHECK-ERRORS: sxtb r8, r3, ror #8 -
304 @ CHECK-ERRORS: sxtab r3, r8, r3, ror #(fred - wilma)
307 @ CHECK-ERRORS: sxtab r7, r8, r3, ror #25
[all …]
Dthumb-shift-encoding.s15 sbc.w r8, r1, r0, ror #16
25 @ CHECK: sbc.w r8, r1, r0, ror #16 @ encoding: [0x61,0xeb,0x30,0x48]
35 and.w r8, r1, r0, ror #16
45 @ CHECK: and.w r8, r1, r0, ror #16 @ encoding: [0x01,0xea,0x30,0x48]
Darm-aliases.s6 sub r1, r2, r3, ror #0
9 and r1, r2, r3, ror #0
/external/llvm/test/CodeGen/Thumb2/
Dthumb2-uxtb.ll17 ; ARMv7A: uxtb16 r0, r0, ror #8
29 ; ARMv7A: uxtb16 r0, r0, ror #8
41 ; ARMv7A: uxtb16 r0, r0, ror #8
53 ; ARMv7A: uxtb16 r0, r0, ror #8
65 ; ARMv7A: uxtb16 r0, r0, ror #16
69 ; ARMv7M: and.w r0, r1, r0, ror #16
80 ; ARMv7A: uxtb16 r0, r0, ror #16
84 ; ARMv7M: and.w r0, r1, r0, ror #16
95 ; ARMv7A: uxtb16 r0, r0, ror #24
99 ; ARMv7M: and.w r0, r1, r0, ror #24
[all …]
Dthumb2-ror.ll5 ; CHECK: ror.w r0, r0, #22
15 ; CHECK: ror
/external/compiler-rt/lib/arm/
Dbswapdi2.S22 eor r2, r0, r0, ror #16
25 eor r2, r2, r0, ror #8
27 eor r0, r1, r1, ror #16
30 eor r0, r0, r1, ror #8
Dbswapsi2.S21 eor r1, r0, r0, ror #16
24 eor r0, r1, r0, ror #8
/external/libvpx/libvpx/vp8/encoder/arm/armv6/
Dvp8_subtract_armv6.asm49 uxtb16 r0, r0, ror #8 ; [s3 | s1]
50 uxtb16 r1, r1, ror #8 ; [p3 | p1]
95 uxtb16 r10, r6, ror #8 ; [s3 | s1] (A)
96 uxtb16 r11, r7, ror #8 ; [p3 | p1] (A)
112 uxtb16 r10, r10, ror #8 ; [s3 | s1] (B)
113 uxtb16 r11, r11, ror #8 ; [p3 | p1] (B)
140 uxtb16 r10, r6, ror #8 ; [s3 | s1] (A)
141 uxtb16 r11, r7, ror #8 ; [p3 | p1] (A)
157 uxtb16 r10, r10, ror #8 ; [s3 | s1] (B)
158 uxtb16 r11, r11, ror #8 ; [p3 | p1] (B)
[all …]
Dvp8_mse16x16_armv6.asm60 uxtb16 r7, r8, ror #8 ; another two pixels to halfwords
79 uxtb16 r7, r8, ror #8 ; another two pixels to halfwords
100 uxtb16 r7, r8, ror #8 ; another two pixels to halfwords
123 uxtb16 r7, r8, ror #8 ; another two pixels to halfwords
/external/llvm/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt47 # CHECK: adc r4, r5, r6, ror #1
48 # CHECK: adc r4, r5, r6, ror #31
53 # CHECK: adc r6, r7, r8, ror r9
65 # CHECK: adc r4, r4, r5, ror #1
66 # CHECK: adc r4, r4, r5, ror #31
71 # CHECK: adc r6, r6, r7, ror r9
120 # CHECK: add r4, r5, r6, ror #5
124 # CHECK: add r6, r7, r8, ror r9
133 # CHECK: add r4, r4, r5, ror #5
137 # CHECK: add r6, r6, r7, ror r9
[all …]
Dthumb2.txt33 # CHECK: adc.w r0, r1, r3, ror #4
81 # CHECK: add.w r4, r8, r1, ror #12
120 # CHECK: and.w r9, r12, r1, ror #17
213 # CHECK: bic.w r5, r6, r8, ror #1
221 # CHECK: bic.w r12, r12, r6, ror #29
304 #CHECK: cmn.w r1, r6, ror #10
324 #CHECK: cmp.w r1, r4, ror #15
432 #CHECK: eor.w r4, r5, r6, ror #5
1117 # CHECK: mvn.w r5, r6, ror #6
1150 # CHECK: orn r4, r5, r6, ror #5
[all …]
/external/libvpx/libvpx/vp8/common/arm/armv6/
Ddc_only_idct_add_v6.asm36 uxtab16 r4, r0, r4, ror #8 ; a1+3 | a1+1
38 uxtab16 r6, r0, r6, ror #8
51 uxtab16 r4, r0, r4, ror #8
53 uxtab16 r6, r0, r6, ror #8
Dintra4x4_predict_v6.asm93 uxtb16 r11, r8, ror #8 ; a[3|1]
149 uxtb16 r5, r8, ror #8 ; a[3|1]
229 uxtb16 r7, r4, ror #8 ; a[3|1]
231 uxtb16 r9, r5, ror #8 ; a[7|5]
236 add r4, r4, r10, ror #16 ; [a2+2*a3+a4 | a0+2*a1+a2]
239 add r5, r7, r10, ror #15 ; [a3+2*a4 | a1+2*a2]
240 add r5, r5, r11, ror #16 ; [a3+2*a4+a5 | a1+2*a2+a3]
290 uxtb16 r10, lr, ror #8 ; p[8|6]
329 uxtab r9, r9, r4, ror #16 ; [5|4|3|2]
353 uxtb16 r10, lr, ror #8 ; p[8|6]
[all …]
Dsimpleloopfilter_v6.asm33 uxtb16 $a1, $a1, ror #8 ; xx 13 xx 11
34 uxtb16 $a3, $a3, ror #8 ; xx 33 xx 31
35 uxtb16 $a0, $a0, ror #8 ; xx 03 xx 01
36 uxtb16 $a2, $a2, ror #8 ; xx 23 xx 21
/external/openssl/crypto/aes/asm/
Daes-armv4.S247 eor r0,r0,r7,ror#8
250 eor r5,r5,r8,ror#8
252 eor r6,r6,r9,ror#8
255 eor r1,r1,r4,ror#24
260 eor r0,r0,r7,ror#16
263 eor r1,r1,r8,ror#8
265 eor r6,r6,r9,ror#16
268 eor r2,r2,r5,ror#16
273 eor r0,r0,r7,ror#24
275 eor r1,r1,r8,ror#16
[all …]
/external/valgrind/main/none/tests/arm/
Dv6intARM.stdout.exp296 ror r0, r1, r2 :: rd 0x00088000 rm 0x00088000, rn 0x00000000, carryin 0, cpsr 0x00000000
297 ror r0, r1, r2 :: rd 0x40044000 rm 0x80088000, rn 0x00000001, carryin 0, cpsr 0x00000000
298 ror r0, r1, r2 :: rd 0x00044000 rm 0x00088000, rn 0x00000001, carryin 0, cpsr 0x00000000
299 ror r0, r1, r2 :: rd 0x00022000 rm 0x00088000, rn 0x00000002, carryin 0, cpsr 0x00000000
300 ror r0, r1, r2 :: rd 0x00110000 rm 0x00088000, rn 0x0000001f, carryin 0, cpsr 0x00000000
301 ror r0, r1, r2 :: rd 0x00088000 rm 0x00088000, rn 0x00000020, carryin 0, cpsr 0x00000000
302 ror r0, r1, r2 :: rd 0x00044000 rm 0x00088000, rn 0x00000021, carryin 0, cpsr 0x00000000
303 ror r0, r1, r2 :: rd 0x00110000 rm 0x00088000, rn 0x0000003f, carryin 0, cpsr 0x00000000
304 ror r0, r1, r2 :: rd 0x00088000 rm 0x00088000, rn 0x00000040, carryin 0, cpsr 0x00000000
305 ror r0, r1, r2 :: rd 0x00110000 rm 0x00088000, rn 0x000000ff, carryin 0, cpsr 0x00000000
[all …]
/external/llvm/test/CodeGen/AArch64/
Dlogical_shifted_reg.s60 eon w3, w1, w2, ror #20
63 and w1, w1, w2, ror #20
128 eon x2, x0, x1, ror #20
131 and x0, x0, x1, ror #20
/external/llvm/lib/Target/X86/
DX86InstrShiftRotate.td575 "ror{b}\t{%cl, $dst|$dst, CL}",
578 "ror{w}\t{%cl, $dst|$dst, CL}",
581 "ror{l}\t{%cl, $dst|$dst, CL}",
584 "ror{q}\t{%cl, $dst|$dst, CL}",
589 "ror{b}\t{$src2, $dst|$dst, $src2}",
592 "ror{w}\t{$src2, $dst|$dst, $src2}",
597 "ror{l}\t{$src2, $dst|$dst, $src2}",
602 "ror{q}\t{$src2, $dst|$dst, $src2}",
608 "ror{b}\t$dst",
612 "ror{w}\t$dst",
[all …]

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