| /external/llvm/test/CodeGen/Mips/ |
| D | rotate.ll | 3 ; CHECK: rotrv $2, $4
22 ; CHECK: rotrv $2, $4, $5
|
| /external/llvm/test/MC/Mips/ |
| D | mips64-alu-instructions.s | 18 # CHECK: rotrv $9, $6, $7 # encoding: [0x46,0x48,0xe6,0x00]
45 rotrv $9, $6, $7
|
| D | mips-alu-instructions.s | 18 # CHECK: rotrv $9, $6, $7 # encoding: [0x46,0x48,0xe6,0x00]
45 rotrv $9, $6, $7
|
| /external/v8/test/cctest/ |
| D | test-disasm-mips.cc | 289 COMPARE(rotrv(a0, a1, a2), in TEST()
291 COMPARE(rotrv(s0, s1, s2), in TEST()
293 COMPARE(rotrv(t2, t3, t4), in TEST()
295 COMPARE(rotrv(v0, v1, fp), in TEST()
|
| /external/valgrind/main/none/tests/mips32/ |
| D | MIPS32int.stdout.exp-BE | 682 rotrv $t0, $t1, $t2 :: rd 0x6282b24e rs 0x31415927, rt 0xffffffff
683 rotrv $t0, $t1, $t2 :: rd 0x31415927 rs 0x31415927, rt 0xee00ee00
684 rotrv $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x000000ff
685 rotrv $t0, $t1, $t2 :: rd 0xffffffff rs 0xffffffff, rt 0x00000000
686 rotrv $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000001
687 rotrv $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000
688 rotrv $t0, $t1, $t2 :: rd 0x00000001 rs 0x80000000, rt 0xffffffff
689 rotrv $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x80000000
690 rotrv $t0, $t1, $t2 :: rd 0x7fffffff rs 0x7fffffff, rt 0x00000000
691 rotrv $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x80000000
[all …]
|
| D | MIPS32int.stdout.exp | 682 rotrv $t0, $t1, $t2 :: rd 0x6282b24e rs 0x31415927, rt 0xffffffff
683 rotrv $t0, $t1, $t2 :: rd 0x31415927 rs 0x31415927, rt 0xee00ee00
684 rotrv $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x000000ff
685 rotrv $t0, $t1, $t2 :: rd 0xffffffff rs 0xffffffff, rt 0x00000000
686 rotrv $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000001
687 rotrv $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000
688 rotrv $t0, $t1, $t2 :: rd 0x00000001 rs 0x80000000, rt 0xffffffff
689 rotrv $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x80000000
690 rotrv $t0, $t1, $t2 :: rd 0x7fffffff rs 0x7fffffff, rt 0x00000000
691 rotrv $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x80000000
[all …]
|
| /external/llvm/test/MC/Disassembler/Mips/ |
| D | mips32r2.txt | 324 # CHECK: rotrv $9, $6, $7
|
| D | mips32r2_le.txt | 324 # CHECK: rotrv $9, $6, $7
|
| /external/v8/src/mips/ |
| D | assembler-mips.h | 739 void rotrv(Register rd, Register rt, Register rs);
|
| D | assembler-mips.cc | 1328 void Assembler::rotrv(Register rd, Register rt, Register rs) { in rotrv() function in v8::internal::Assembler
|
| D | macro-assembler-mips.cc | 749 rotrv(rd, rs, rt.rm()); in Ror()
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.td | 842 def ROTRV : shift_rotate_reg<"rotrv", CPURegsOpnd, rotr>, SRLV_FM<6, 1>;
|