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Searched refs:tcg_gen_ld32u_tl (Results 1 – 2 of 2) sorted by relevance

/external/qemu/target-i386/
Dtranslate.c367 tcg_gen_ld32u_tl(cpu_A0, cpu_env, offsetof(CPUState, regs[reg]) + REG_L_OFFSET); in gen_op_movl_A0_reg()
475 tcg_gen_ld32u_tl(cpu_A0, cpu_env, offsetof(CPUState, segs[reg].base) + REG_L_OFFSET); in gen_op_movl_A0_seg()
2372 tcg_gen_ld32u_tl(cpu_T[0], cpu_env, in gen_op_movl_T0_seg()
3334 tcg_gen_ld32u_tl(cpu_T[0], cpu_env, in gen_sse()
3348 tcg_gen_ld32u_tl(cpu_T[0], cpu_env, in gen_sse()
3392 tcg_gen_ld32u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(0))); in gen_sse()
3820 tcg_gen_ld32u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State, in gen_sse()
6919 tcg_gen_ld32u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,ldt.selector)); in disas_insn()
6942 tcg_gen_ld32u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,tr.selector)); in disas_insn()
6989 tcg_gen_ld32u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State, gdt.limit)); in disas_insn()
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/external/qemu/tcg/
Dtcg-op.h2387 #define tcg_gen_ld32u_tl tcg_gen_ld32u_i64 macro
2459 #define tcg_gen_ld32u_tl tcg_gen_ld_i32 macro