Searched refs:tcg_gen_ld_tl (Results 1 – 3 of 3) sorted by relevance
| /external/qemu/target-mips/ |
| D | translate.c | 564 tcg_gen_ld_tl(t0, addr, sizeof(target_ulong) * from); in gen_load_srsgpr()
952 tcg_gen_ld_tl(t0, cpu_env, offsetof(CPUState, lladdr)); \
2879 tcg_gen_ld_tl(arg, cpu_env, off); in gen_mfc0_load64()
2979 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUState, CP0_EntryLo0)); in gen_mfc0()
3025 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUState, CP0_EntryLo1)); in gen_mfc0()
3036 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUState, CP0_Context)); in gen_mfc0()
3112 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUState, CP0_BadVAddr)); in gen_mfc0()
3141 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUState, CP0_EntryHi)); in gen_mfc0()
3198 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUState, CP0_EPC)); in gen_mfc0()
3288 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUState, CP0_XContext)); in gen_mfc0()
[all …]
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| /external/qemu/target-i386/ |
| D | translate.c | 355 tcg_gen_ld_tl(t0, cpu_env, offsetof(CPUState, regs[reg])); in gen_op_mov_v_reg()
409 tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg])); in gen_op_add_reg_im()
414 tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg])); in gen_op_add_reg_im()
423 tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg])); in gen_op_add_reg_im()
435 tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg])); in gen_op_add_reg_T0()
440 tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg])); in gen_op_add_reg_T0()
449 tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg])); in gen_op_add_reg_T0()
464 tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg])); in gen_op_addl_A0_reg_sN()
480 tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, segs[reg].base)); in gen_op_addl_A0_seg()
490 tcg_gen_ld_tl(cpu_A0, cpu_env, offsetof(CPUState, segs[reg].base)); in gen_op_movq_A0_seg()
[all …]
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| /external/qemu/tcg/ |
| D | tcg-op.h | 2389 #define tcg_gen_ld_tl tcg_gen_ld_i64 macro
2461 #define tcg_gen_ld_tl tcg_gen_ld_i32 macro
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