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/external/llvm/test/CodeGen/ARM/
Dvfloatintrinsics.ll7 %v2f32 = type <2 x float>
9 define %v2f32 @test_v2f32.sqrt(%v2f32 %a) {
11 %1 = call %v2f32 @llvm.sqrt.v2f32(%v2f32 %a)
12 ret %v2f32 %1
15 define %v2f32 @test_v2f32.powi(%v2f32 %a, i32 %b) {
17 %1 = call %v2f32 @llvm.powi.v2f32(%v2f32 %a, i32 %b)
18 ret %v2f32 %1
21 define %v2f32 @test_v2f32.sin(%v2f32 %a) {
23 %1 = call %v2f32 @llvm.sin.v2f32(%v2f32 %a)
24 ret %v2f32 %1
[all …]
Dvrec.ll23 %tmp2 = call <2 x float> @llvm.arm.neon.vrecpe.v2f32(<2 x float> %tmp1)
38 declare <2 x float> @llvm.arm.neon.vrecpe.v2f32(<2 x float>) nounwind readnone
46 %tmp3 = call <2 x float> @llvm.arm.neon.vrecps.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
59 declare <2 x float> @llvm.arm.neon.vrecps.v2f32(<2 x float>, <2 x float>) nounwind readnone
82 %tmp2 = call <2 x float> @llvm.arm.neon.vrsqrte.v2f32(<2 x float> %tmp1)
97 declare <2 x float> @llvm.arm.neon.vrsqrte.v2f32(<2 x float>) nounwind readnone
105 %tmp3 = call <2 x float> @llvm.arm.neon.vrsqrts.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
118 declare <2 x float> @llvm.arm.neon.vrsqrts.v2f32(<2 x float>, <2 x float>) nounwind readnone
Dfabs-neon.ll14 %foo = call <2 x float> @llvm.fabs.v2f32(<2 x float> %a)
17 declare <2 x float> @llvm.fabs.v2f32(<2 x float> %a)
D2009-08-29-ExtractEltf32.ll7 …%0 = tail call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> undef, <2 x float> undef) nounwi…
25 declare <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float>, <2 x float>) nounwind readnone
D2009-11-01-NeonMoves.ll19 …%5 = call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> %3, <2 x float> %4) nounwind ; <<2 x …
20 …%6 = call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> %5, <2 x float> %5) nounwind ; <<2 x …
36 declare <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float>, <2 x float>) nounwind readnone
Dneon-fma.ll8 …%call = tail call <2 x float> @llvm.fma.v2f32(<2 x float> %a, <2 x float> %b, <2 x float> %c) noun…
21 declare <2 x float> @llvm.fma.v2f32(<2 x float>, <2 x float>, <2 x float>) nounwind readnone
Dvcvt.ll71 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtfp2fxs.v2i32.v2f32(<2 x float> %tmp1, i32 1)
79 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtfp2fxu.v2i32.v2f32(<2 x float> %tmp1, i32 1)
87 %tmp2 = call <2 x float> @llvm.arm.neon.vcvtfxs2fp.v2f32.v2i32(<2 x i32> %tmp1, i32 1)
95 %tmp2 = call <2 x float> @llvm.arm.neon.vcvtfxu2fp.v2f32.v2i32(<2 x i32> %tmp1, i32 1)
99 declare <2 x i32> @llvm.arm.neon.vcvtfp2fxs.v2i32.v2f32(<2 x float>, i32) nounwind readnone
100 declare <2 x i32> @llvm.arm.neon.vcvtfp2fxu.v2i32.v2f32(<2 x float>, i32) nounwind readnone
101 declare <2 x float> @llvm.arm.neon.vcvtfxs2fp.v2f32.v2i32(<2 x i32>, i32) nounwind readnone
102 declare <2 x float> @llvm.arm.neon.vcvtfxu2fp.v2f32.v2i32(<2 x i32>, i32) nounwind readnone
D2013-02-27-expand-vfma.ll26 %tmp = tail call <2 x float> @llvm.fma.v2f32(<2 x float> %b, <2 x float> %c, <2 x float> %a) #2
30 declare <2 x float> @llvm.fma.v2f32(<2 x float>, <2 x float>, <2 x float>) #1
D2009-09-13-InvalidSubreg.ll12 declare <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float>, <2 x float>) nounwind readnone
45 …%22 = tail call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> %20, <2 x float> %21) nounwind …
46 …%23 = tail call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> %22, <2 x float> %22) nounwind …
Dvpminmax.ll62 %tmp3 = call <2 x float> @llvm.arm.neon.vpmins.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
74 declare <2 x float> @llvm.arm.neon.vpmins.v2f32(<2 x float>, <2 x float>) nounwind readnone
135 %tmp3 = call <2 x float> @llvm.arm.neon.vpmaxs.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
147 declare <2 x float> @llvm.arm.neon.vpmaxs.v2f32(<2 x float>, <2 x float>) nounwind readnone
Dvst1.ll35 call void @llvm.arm.neon.vst1.v2f32(i8* %tmp0, <2 x float> %tmp1, i32 1)
46 call void @llvm.arm.neon.vst1.v2f32(i8* %tmp0, <2 x float> %tmp1, i32 1)
123 declare void @llvm.arm.neon.vst1.v2f32(i8*, <2 x float>, i32) nounwind
Dvld2.ll52 %tmp1 = call %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2.v2f32(i8* %tmp0, i32 1)
65 %tmp1 = call %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2.v2f32(i8* %tmp0, i32 1)
149 declare %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2.v2f32(i8*, i32) nounwind readonly
Dvstlane.ll154 …call void @llvm.arm.neon.vst2lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, i32 1, i3…
190 declare void @llvm.arm.neon.vst2lane.v2f32(i8*, <2 x float>, <2 x float>, i32, i32) nounwind
228 …call void @llvm.arm.neon.vst3lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x floa…
276 declare void @llvm.arm.neon.vst3lane.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, i32, i32) no…
328 …call void @llvm.arm.neon.vst4lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x floa…
371 declare void @llvm.arm.neon.vst4lane.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, <2 x float>,…
Dwiden-vmovs.ll8 ; The vmovs is first widened to a vmovd, and then converted to a vorr because of the v2f32 vadd.f32.
Dneon_fpconv.ll3 ; PR12540: ARM backend lowering of FP_ROUND v2f64 to v2f32.
Dvabs.ll31 %tmp2 = call <2 x float> @llvm.arm.neon.vabs.v2f32(<2 x float> %tmp1)
70 declare <2 x float> @llvm.arm.neon.vabs.v2f32(<2 x float>) nounwind readnone
/external/llvm/lib/Target/ARM/
DARMCallingConv.td27 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
46 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
60 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
72 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
88 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
139 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
149 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
167 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
179 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
DARMTargetTransformInfo.cpp184 { ISD::FP_EXTEND, MVT::v2f32, 2 }, in getCastInstrCost()
226 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost()
227 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost()
228 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i16, 2 }, in getCastInstrCost()
229 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i16, 2 }, in getCastInstrCost()
230 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 }, in getCastInstrCost()
231 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 }, in getCastInstrCost()
432 { ISD::VECTOR_SHUFFLE, MVT::v2f32, 1 }, in getShuffleCost()
DARMInstrNEON.td1042 def : Pat<(vector_insert (v2f32 DPR:$src),
1319 def : Pat<(v2f32 (NEONvdup (f32 (load addrmode6dup:$addr)))),
2010 def : Pat<(store (extractelt (v2f32 DPR:$src), imm:$lane), addrmode6:$addr),
3089 def v2f32 : N2V<op24_23, op21_20, 0b10, op17_16, op11_7, 0, op4,
3092 [(set DPR:$Vd, (v2i32 (OpNode (v2f32 DPR:$Vm))))]> {
3935 v2f32, v2f32, fadd, 1>;
3984 v2f32, v2f32, fmul, 1>;
3988 def VMULslfd : N3VDSL<0b10, 0b1001, IIC_VBIND, "vmul", "f32", v2f32, fmul>;
3990 v2f32, fmul>;
4007 (v2f32 (EXTRACT_SUBREG QPR:$src2,
[all …]
/external/llvm/include/llvm/CodeGen/
DValueTypes.h97 v2f32 = 42, // 2 x f32 enumerator
206 SimpleTy == MVT::v2f32); in is64BitVector()
291 case v2f32: in getVectorElementType()
336 case v2f32: in getVectorNumElements()
382 case v2f32: return 64; in getSizeInBits()
524 if (NumElements == 2) return MVT::v2f32; in getVectorVT()
/external/llvm/test/CodeGen/PowerPC/
Dvec_sqrt.ll9 declare <2 x float> @llvm.sqrt.v2f32(<2 x float> %val)
17 %sqrt = call <2 x float> @llvm.sqrt.v2f32 (<2 x float> %x)
/external/llvm/test/CodeGen/X86/
Dwiden_conv-3.ll4 ; sign to float v2i16 to v2f32
D2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll4 ; Check that x86-64 tail calls support x86_fp80 and v2f32 types. (Tail call
/external/llvm/lib/Target/NVPTX/
DNVPTXVector.td65 // Extract v2f32
70 (v2f32 V2F32Regs:$src), imm:$c))],
152 // Insert v2f32
768 def : Pat<(v2f32 (vec_shuf:$op V2F32Regs:$src1, V2F32Regs:$src2)),
872 def : Pat<(v2f32 (extract_subvec V4F32Regs:$src, 0)),
875 def : Pat<(v2f32 (extract_subvec V4F32Regs:$src, 2)),
1339 // f64 -> v2f32
1348 // v2f32 -> f64
1387 // i64 -> v2f32
1388 def : Pat<(v2f32 (bitconvert Int64Regs:$s)),
[all …]
/external/llvm/lib/IR/
DValueTypes.cpp159 case MVT::v2f32: return "v2f32"; in getEVTString()
223 case MVT::v2f32: return VectorType::get(Type::getFloatTy(Context), 2); in getTypeForEVT()

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