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/system/core/libpixelflinger/codeflinger/
DMIPSAssembler.h272 void ADDU(int Rd, int Rs, int Rt);
273 void ADDIU(int Rt, int Rs, int16_t imm);
274 void SUBU(int Rd, int Rs, int Rt);
275 void SUBIU(int Rt, int Rs, int16_t imm);
277 void MUL(int Rd, int Rs, int Rt);
278 void MULT(int Rs, int Rt); // dest is hi,lo
279 void MULTU(int Rs, int Rt); // dest is hi,lo
280 void MADD(int Rs, int Rt); // hi,lo = hi,lo + Rs * Rt
281 void MADDU(int Rs, int Rt); // hi,lo = hi,lo + Rs * Rt
282 void MSUB(int Rs, int Rt); // hi,lo = hi,lo - Rs * Rt
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DMIPSAssembler.cpp1439 void MIPSAssembler::ADDU(int Rd, int Rs, int Rt) in ADDU() argument
1442 | (Rs<<RS_SHF) | (Rt<<RT_SHF) | (Rd<<RD_SHF); in ADDU()
1446 void MIPSAssembler::ADDIU(int Rt, int Rs, int16_t imm) in ADDIU() argument
1448 *mPC++ = (addiu_op<<OP_SHF) | (Rt<<RT_SHF) | (Rs<<RS_SHF) | (imm & MSK_16); in ADDIU()
1452 void MIPSAssembler::SUBU(int Rd, int Rs, int Rt) in SUBU() argument
1455 (Rs<<RS_SHF) | (Rt<<RT_SHF) | (Rd<<RD_SHF) ; in SUBU()
1459 void MIPSAssembler::SUBIU(int Rt, int Rs, int16_t imm) // really addiu(d, s, -j) in SUBIU() argument
1461 *mPC++ = (addiu_op<<OP_SHF) | (Rt<<RT_SHF) | (Rs<<RS_SHF) | ((-imm) & MSK_16); in SUBIU()
1470 void MIPSAssembler::MUL(int Rd, int Rs, int Rt) in MUL() argument
1473 (Rs<<RS_SHF) | (Rt<<RT_SHF) | (Rd<<RD_SHF) ; in MUL()
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