| /system/core/libpixelflinger/codeflinger/ |
| D | load_store.cpp | 37 if (inc) STR(AL, s.reg, addr.reg, immed12_post(4)); in store()
38 else STR(AL, s.reg, addr.reg); in store()
43 STRB(AL, s.reg, addr.reg, immed12_pre(0)); in store()
44 MOV(AL, 0, s.reg, reg_imm(s.reg, ROR, 8)); in store()
45 STRB(AL, s.reg, addr.reg, immed12_pre(1)); in store()
46 MOV(AL, 0, s.reg, reg_imm(s.reg, ROR, 8)); in store()
47 STRB(AL, s.reg, addr.reg, immed12_pre(2)); in store()
49 MOV(AL, 0, s.reg, reg_imm(s.reg, ROR, 16)); in store()
52 ADD(AL, 0, addr.reg, addr.reg, imm(3)); in store()
55 if (inc) STRH(AL, s.reg, addr.reg, immed8_post(2)); in store()
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| D | blending.cpp | 40 integer_t fragment(temp.reg, temp.h, temp.flags); in build_fog()
42 temp.reg = regs.obtain(); in build_fog()
47 LDRB(AL, fogColor.reg, mBuilderContext.Rctx, in build_fog()
51 CONTEXT_LOAD(factor.reg, generated_vars.f); in build_fog()
55 BIC(AL, 0, factor.reg, factor.reg, reg_imm(factor.reg, ASR, 31)); in build_fog()
56 CMP(AL, factor.reg, imm( 0x10000 )); in build_fog()
57 MOV(HS, 0, factor.reg, imm( 0x10000 )); in build_fog()
138 MOV(AL, 0, temp.reg, reg_imm(temp.reg, LSR, temp.l)); in build_blending()
142 integer_t fragment(temp.reg, temp.size(), temp.flags); in build_blending()
147 fragment.reg = scratches.obtain(); in build_blending()
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| D | GGLAssembler.cpp | 208 MOV(AL, 0, parts.count.reg, in scanline_core()
209 reg_imm(parts.count.reg, ROR, GGL_DITHER_ORDER_SHIFT)); in scanline_core()
210 ADD(AL, 0, parts.count.reg, parts.count.reg, in scanline_core()
212 MOV(AL, 0, parts.count.reg, in scanline_core()
213 reg_imm(parts.count.reg, ROR, 32 - GGL_DITHER_ORDER_SHIFT)); in scanline_core()
265 AND(AL, 0, parts.dither.reg, parts.count.reg, imm(mask)); in scanline_core()
266 ADD(AL, 0, parts.dither.reg, parts.dither.reg, ctxtReg); in scanline_core()
267 LDRB(AL, parts.dither.reg, parts.dither.reg, in scanline_core()
292 if (pixel.reg == -1) { in scanline_core()
324 SUB(AL, S, parts.count.reg, parts.count.reg, imm(1<<16)); in scanline_core()
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| D | texturing.cpp | 88 parts.argb[i].reg = c; in init_iterated_color()
91 parts.argb_dx[i].reg = (parts.reload & 2) ? t1 : obtainReg(); in init_iterated_color()
92 const int dvdx = parts.argb_dx[i].reg; in init_iterated_color()
94 MLA(AL, 0, c, x.reg, dvdx, c); in init_iterated_color()
102 MOV(AL, 0, end, reg_imm(parts.count.reg, LSR, 16)); in init_iterated_color()
136 CONTEXT_LOAD(parts.iterated.reg, packed8888); in init_iterated_color()
160 CONTEXT_LOAD(parts.iterated.reg, packed); in init_iterated_color()
162 AND(AL, 0, parts.iterated.reg, in init_iterated_color()
163 parts.iterated.reg, imm(0xFF)); in init_iterated_color()
165 MOV(AL, 0, parts.iterated.reg, in init_iterated_color()
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| D | GGLAssembler.h | 48 int reserveReg(int reg);
50 void recycleReg(int reg);
67 int reserve(int reg);
70 void recycle(int reg);
74 inline int isUsed(int reg) const;
105 int reg = mRegFile.obtain(); in obtain() local
106 mScratch |= 1<<reg; in obtain()
107 return reg; in obtain()
109 void recycle(int reg) { in recycle() argument
110 mRegFile.recycle(reg); in recycle()
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| D | MIPSAssembler.cpp | 236 amode.reg = Rm; in reg_imm()
282 amode.reg = Rm; in reg_scale_pre()
322 amode.reg = Rm; in reg_pre()
397 case LSL: mMips->SLL(tmpReg, amode.reg, amode.value); break; in dataProcAdrModes()
398 case LSR: mMips->SRL(tmpReg, amode.reg, amode.value); break; in dataProcAdrModes()
399 case ASR: mMips->SRA(tmpReg, amode.reg, amode.value); break; in dataProcAdrModes()
401 mMips->ROTR(tmpReg, amode.reg, amode.value); in dataProcAdrModes()
403 mMips->RORIsyn(tmpReg, amode.reg, amode.value); in dataProcAdrModes()
508 case LSL: mMips->SLL(Rd, amode.reg, amode.value); break; in dataProcessing()
509 case LSR: mMips->SRL(Rd, amode.reg, amode.value); break; in dataProcessing()
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| D | MIPSAssembler.h | 210 int reg; member
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| /system/extras/ext4_utils/ |
| D | allocate.c | 102 static void region_list_remove(struct region_list *list, struct region *reg) in region_list_remove() argument
104 if (reg->prev) in region_list_remove()
105 reg->prev->next = reg->next; in region_list_remove()
107 if (reg->next) in region_list_remove()
108 reg->next->prev = reg->prev; in region_list_remove()
110 if (list->first == reg) in region_list_remove()
111 list->first = reg->next; in region_list_remove()
113 if (list->last == reg) in region_list_remove()
114 list->last = reg->prev; in region_list_remove()
116 reg->next = NULL; in region_list_remove()
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| /system/core/libcorkscrew/arch-x86/ |
| D | backtrace-x86.c | 88 uint32_t reg[DWARF_REGISTERS]; member
332 uint32_t reg = 0; in execute_dwarf() local
376 if (!try_get_uleb128(memory, ptr, ®, cursor)) return false; in execute_dwarf()
378 if (reg > DWARF_REGISTERS) { in execute_dwarf()
379 …ALOGE("DW_CFA_offset_extended: r%d exceeds supported number of registers (%d)", reg, DWARF_REGISTE… in execute_dwarf()
382 dstate->regs[reg].rule = 'o'; in execute_dwarf()
383 dstate->regs[reg].value = offset * cie_info->data_align; in execute_dwarf()
384 ALOGV("DW_CFA_offset_extended: r%d = o(%d)", reg, dstate->regs[reg].value); in execute_dwarf()
387 if (!try_get_uleb128(memory, ptr, ®, cursor)) return false; in execute_dwarf()
388 dstate->regs[reg].rule = stack->regs[reg].rule; in execute_dwarf()
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| D | dwarf.h | 85 uint32_t reg; member
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| /system/core/debuggerd/mips/ |
| D | machine.c | 114 for (int reg = 0; reg < 32; reg++) { in dump_memory_and_code() local
116 if (reg == 0 /* $0 */ in dump_memory_and_code()
117 || reg == 26 /* $k0 */ in dump_memory_and_code()
118 || reg == 27 /* $k1 */ in dump_memory_and_code()
119 || reg == 31 /* $ra (done below) */ in dump_memory_and_code()
123 uintptr_t addr = R(r.regs[reg]); in dump_memory_and_code()
133 _LOG(log, scopeFlags | SCOPE_SENSITIVE, "\nmemory near %.2s:\n", ®_NAMES[reg * 2]); in dump_memory_and_code()
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| /system/core/debuggerd/arm/ |
| D | machine.c | 125 for (int reg = 0; reg < 14; reg++) { in dump_memory_and_code() local
127 uintptr_t addr = regs.uregs[reg]; in dump_memory_and_code()
137 _LOG(log, scopeFlags | SCOPE_SENSITIVE, "\nmemory near %.2s:\n", ®_NAMES[reg * 2]); in dump_memory_and_code()
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| /system/core/libcutils/arch-x86/ |
| D | sse2-memset32-atom.S | 37 # define cfi_rel_offset(reg, off) .cfi_rel_offset reg, off argument
41 # define cfi_restore(reg) .cfi_restore reg argument
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| D | sse2-memset16-atom.S | 37 # define cfi_rel_offset(reg, off) .cfi_rel_offset reg, off argument
41 # define cfi_restore(reg) .cfi_restore reg argument
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| /system/core/libcorkscrew/arch-arm/ |
| D | backtrace-arm.c | 239 static void set_reg(unwind_state_t* state, uint32_t reg, uint32_t value) { in set_reg() argument
240 ALOGV("set_reg: reg=%d, value=0x%08x", reg, value); in set_reg()
241 state->gregs[reg] = value; in set_reg()
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