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1set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
2
3tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
4tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
5tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
6tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
7tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
8tablegen(LLVM AMDGPUGenIntrinsics.inc -gen-tgt-intrinsic)
9tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter -mc-emitter)
10tablegen(LLVM AMDGPUGenDFAPacketizer.inc -gen-dfa-packetizer)
11tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
12add_public_tablegen_target(AMDGPUCommonTableGen)
13
14add_llvm_target(R600CodeGen
15  AMDIL7XXDevice.cpp
16  AMDILCFGStructurizer.cpp
17  AMDILDevice.cpp
18  AMDILDeviceInfo.cpp
19  AMDILEvergreenDevice.cpp
20  AMDILIntrinsicInfo.cpp
21  AMDILISelDAGToDAG.cpp
22  AMDILISelLowering.cpp
23  AMDILNIDevice.cpp
24  AMDILPeepholeOptimizer.cpp
25  AMDILSIDevice.cpp
26  AMDGPUAsmPrinter.cpp
27  AMDGPUFrameLowering.cpp
28  AMDGPUIndirectAddressing.cpp
29  AMDGPUMCInstLower.cpp
30  AMDGPUSubtarget.cpp
31  AMDGPUStructurizeCFG.cpp
32  AMDGPUTargetMachine.cpp
33  AMDGPUISelLowering.cpp
34  AMDGPUConvertToISA.cpp
35  AMDGPUInstrInfo.cpp
36  AMDGPURegisterInfo.cpp
37  R600ExpandSpecialInstrs.cpp
38  R600InstrInfo.cpp
39  R600ISelLowering.cpp
40  R600MachineFunctionInfo.cpp
41  R600MachineScheduler.cpp
42  R600RegisterInfo.cpp
43  SIAnnotateControlFlow.cpp
44  SIInsertWaits.cpp
45  SIInstrInfo.cpp
46  SIISelLowering.cpp
47  SILowerControlFlow.cpp
48  SIMachineFunctionInfo.cpp
49  SIRegisterInfo.cpp
50  )
51
52add_dependencies(LLVMR600CodeGen intrinsics_gen)
53
54add_subdirectory(InstPrinter)
55add_subdirectory(TargetInfo)
56add_subdirectory(MCTargetDesc)
57