170                              Address ad) {  in EmitMemOp()  argument
178                      ad.encoding();  in EmitMemOp()
186                                          Address ad) {  in EmitMemOpAddressMode3()  argument
193                      ad.encoding3();  in EmitMemOpAddressMode3()
463 void ArmAssembler::ldr(Register rd, Address ad, Condition cond) {  in ldr()  argument
464   EmitMemOp(cond, true, false, rd, ad);  in ldr()
468 void ArmAssembler::str(Register rd, Address ad, Condition cond) {  in str()  argument
469   EmitMemOp(cond, false, false, rd, ad);  in str()
473 void ArmAssembler::ldrb(Register rd, Address ad, Condition cond) {  in ldrb()  argument
474   EmitMemOp(cond, true, true, rd, ad);  in ldrb()
478 void ArmAssembler::strb(Register rd, Address ad, Condition cond) {  in strb()  argument
479   EmitMemOp(cond, false, true, rd, ad);  in strb()
483 void ArmAssembler::ldrh(Register rd, Address ad, Condition cond) {  in ldrh()  argument
484   EmitMemOpAddressMode3(cond, L | B7 | H | B4, rd, ad);  in ldrh()
488 void ArmAssembler::strh(Register rd, Address ad, Condition cond) {  in strh()  argument
489   EmitMemOpAddressMode3(cond, B7 | H | B4, rd, ad);  in strh()
493 void ArmAssembler::ldrsb(Register rd, Address ad, Condition cond) {  in ldrsb()  argument
494   EmitMemOpAddressMode3(cond, L | B7 | B6 | B4, rd, ad);  in ldrsb()
498 void ArmAssembler::ldrsh(Register rd, Address ad, Condition cond) {  in ldrsh()  argument
499   EmitMemOpAddressMode3(cond, L | B7 | B6 | H | B4, rd, ad);  in ldrsh()
503 void ArmAssembler::ldrd(Register rd, Address ad, Condition cond) {  in ldrd()  argument
505   EmitMemOpAddressMode3(cond, B7 | B6 | B4, rd, ad);  in ldrd()
509 void ArmAssembler::strd(Register rd, Address ad, Condition cond) {  in strd()  argument
511   EmitMemOpAddressMode3(cond, B7 | B6 | B5 | B4, rd, ad);  in strd()
694 void ArmAssembler::vldrs(SRegister sd, Address ad, Condition cond) {  in vldrs()  argument
701                      B11 | B9 | ad.vencoding();  in vldrs()
706 void ArmAssembler::vstrs(SRegister sd, Address ad, Condition cond) {  in vstrs()  argument
707   CHECK_NE(static_cast<Register>(ad.encoding_ & (0xf << kRnShift)), PC);  in vstrs()
714                      B11 | B9 | ad.vencoding();  in vstrs()
719 void ArmAssembler::vldrd(DRegister dd, Address ad, Condition cond) {  in vldrd()  argument
726                      B11 | B9 | B8 | ad.vencoding();  in vldrd()
731 void ArmAssembler::vstrd(DRegister dd, Address ad, Condition cond) {  in vstrd()  argument
732   CHECK_NE(static_cast<Register>(ad.encoding_ & (0xf << kRnShift)), PC);  in vstrd()
739                      B11 | B9 | B8 | ad.vencoding();  in vstrd()