255   inline int Bit(int nr) const {  in Bit()  function
289   inline int RegShiftField() const { return Bit(4); }  in RegShiftField()
301   inline int  BField() const { return Bit(22); }  in BField()
302   inline int  WField() const { return Bit(21); }  in WField()
303   inline int  LField() const { return Bit(20); }  in LField()
311   inline int SignField() const { return Bit(6); }  in SignField()
312   inline int HField() const { return Bit(5); }  in HField()
335     uint32_t imm32 = (Bit(19) << 31) | (((1 << 5) - Bit(18)) << 25) |  in ImmFloatField()
342     uint64_t imm64 = (Bit(19)*(1LL << 63)) | (((1LL << 8) - Bit(18)) << 54) |  in ImmDoubleField()
354       ((Bit(25) == 1) ||  // Data processing immediate.  in IsDataProcessing()
355        (Bit(4) == 0) ||  // Data processing register.  in IsDataProcessing()
356        (Bit(7) == 0));  // Data processing register-shifted register.  in IsDataProcessing()
364     return ((Bit(25) == 0) && ((Bits(20, 5) & 0x19) == 0x10) && (Bit(7) == 0));  in IsMiscellaneous()
368     return ((Bit(25) == 0) && (Bits(4, 4) == 9));  in IsMultiplyOrSyncPrimitive()
383     return static_cast<SRegister>((Bits(kRnShift, kRnBits) << 1) + Bit(7));  in SnField()
386     return static_cast<SRegister>((Bits(kRdShift, kRdBits) << 1) + Bit(22));  in SdField()
389     return static_cast<SRegister>((Bits(kRmShift, kRmBits) << 1) + Bit(5));  in SmField()
392     return static_cast<DRegister>(Bits(kRnShift, kRnBits) + (Bit(7) << 4));  in DnField()
395     return static_cast<DRegister>(Bits(kRdShift, kRdBits) + (Bit(22) << 4));  in DdField()
398     return static_cast<DRegister>(Bits(kRmShift, kRmBits) + (Bit(5) << 4));  in DmField()
405     return ((Bit(24) == 0) && (Bits(9, 3) == 5));  in IsVFPDataProcessingOrSingleTransfer()