Lines Matching refs:vregA
356 const uint32_t vregA = inst->VRegA_12x(); in CheckBinaryOp2addr() local
358 if (VerifyRegisterType(vregA, src_type1) && in CheckBinaryOp2addr()
362 if (GetRegisterType(vregA).IsBooleanTypes() && in CheckBinaryOp2addr()
364 SetRegisterType(vregA, verifier_->GetRegTypeCache()->Boolean()); in CheckBinaryOp2addr()
368 SetRegisterType(vregA, dst_type); in CheckBinaryOp2addr()
376 const uint32_t vregA = inst->VRegA_12x(); in CheckBinaryOp2addrWide() local
378 if (VerifyRegisterTypeWide(vregA, src_type1_1, src_type1_2) && in CheckBinaryOp2addrWide()
380 SetRegisterTypeWide(vregA, dst_type1, dst_type2); in CheckBinaryOp2addrWide()
387 const uint32_t vregA = inst->VRegA_12x(); in CheckBinaryOp2addrWideShift() local
389 if (VerifyRegisterTypeWide(vregA, long_lo_type, long_hi_type) && in CheckBinaryOp2addrWideShift()
391 SetRegisterTypeWide(vregA, long_lo_type, long_hi_type); in CheckBinaryOp2addrWideShift()
398 const uint32_t vregA = is_lit16 ? inst->VRegA_22s() : inst->VRegA_22b(); in CheckLiteralOp() local
406 SetRegisterType(vregA, verifier_->GetRegTypeCache()->Boolean()); in CheckLiteralOp()
410 SetRegisterType(vregA, dst_type); in CheckLiteralOp()