Lines Matching refs:port

275 #define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port)  argument
277 static inline void out##bwl##_quad(unsigned type value, int port, int quad) { \
279 		write##bwl(value, XQUAD_PORT_ADDR(port, quad)); \
281 		out##bwl##_local(value, port); \
283 static inline void out##bwl(unsigned type value, int port) { \
284 	out##bwl##_quad(value, port, 0); \
286 static inline unsigned type in##bwl##_quad(int port, int quad) { \
288 		return read##bwl(XQUAD_PORT_ADDR(port, quad)); \
290 		return in##bwl##_local(port); \
292 static inline unsigned type in##bwl(int port) { \
293 	return in##bwl##_quad(port, 0); \
297 static inline void out##bwl(unsigned type value, int port) { \
298 	out##bwl##_local(value, port); \
300 static inline unsigned type in##bwl(int port) { \
301 	return in##bwl##_local(port); \
307 static inline void out##bwl##_local(unsigned type value, int port) { \
308 	__asm__ __volatile__("out" #bwl " %" #bw "0, %w1" : : "a"(value), "Nd"(port)); \
310 static inline unsigned type in##bwl##_local(int port) { \
312 	__asm__ __volatile__("in" #bwl " %w1, %" #bw "0" : "=a"(value) : "Nd"(port)); \
315 static inline void out##bwl##_local_p(unsigned type value, int port) { \
316 	out##bwl##_local(value, port); \
319 static inline unsigned type in##bwl##_local_p(int port) { \
320 	unsigned type value = in##bwl##_local(port); \
325 static inline void out##bwl##_p(unsigned type value, int port) { \
326 	out##bwl(value, port); \
329 static inline unsigned type in##bwl##_p(int port) { \
330 	unsigned type value = in##bwl(port); \
334 static inline void outs##bwl(int port, const void *addr, unsigned long count) { \
335 	__asm__ __volatile__("rep; outs" #bwl : "+S"(addr), "+c"(count) : "d"(port)); \
337 static inline void ins##bwl(int port, void *addr, unsigned long count) { \
338 	__asm__ __volatile__("rep; ins" #bwl : "+D"(addr), "+c"(count) : "d"(port)); \