Lines Matching refs:SETCC
114 setOperationAction(ISD::SETCC, MVT::i32, Custom); in AArch64TargetLowering()
115 setOperationAction(ISD::SETCC, MVT::i64, Custom); in AArch64TargetLowering()
116 setOperationAction(ISD::SETCC, MVT::f32, Custom); in AArch64TargetLowering()
117 setOperationAction(ISD::SETCC, MVT::f64, Custom); in AArch64TargetLowering()
232 setOperationAction(ISD::SETCC, MVT::f128, Custom); in AArch64TargetLowering()
285 setOperationAction(ISD::SETCC, MVT::v8i8, Custom); in AArch64TargetLowering()
286 setOperationAction(ISD::SETCC, MVT::v16i8, Custom); in AArch64TargetLowering()
287 setOperationAction(ISD::SETCC, MVT::v4i16, Custom); in AArch64TargetLowering()
288 setOperationAction(ISD::SETCC, MVT::v8i16, Custom); in AArch64TargetLowering()
289 setOperationAction(ISD::SETCC, MVT::v2i32, Custom); in AArch64TargetLowering()
290 setOperationAction(ISD::SETCC, MVT::v4i32, Custom); in AArch64TargetLowering()
291 setOperationAction(ISD::SETCC, MVT::v2i64, Custom); in AArch64TargetLowering()
292 setOperationAction(ISD::SETCC, MVT::v2f32, Custom); in AArch64TargetLowering()
293 setOperationAction(ISD::SETCC, MVT::v4f32, Custom); in AArch64TargetLowering()
294 setOperationAction(ISD::SETCC, MVT::v2f64, Custom); in AArch64TargetLowering()
815 case AArch64ISD::SETCC: return "AArch64ISD::SETCC"; in getTargetNodeName()
1680 return DAG.getNode(AArch64ISD::SETCC, dl, MVT::i32, LHS, RHS, in getSelectableIntSetCC()
1758 SDValue A64CMP = DAG.getNode(AArch64ISD::SETCC, dl, MVT::i32, TheBit, in LowerBRCOND()
1807 SDValue SetCC = DAG.getNode(AArch64ISD::SETCC, dl, MVT::i32, LHS, RHS, in LowerBR_CC()
2252 SDValue SetCC = DAG.getNode(AArch64ISD::SETCC, dl, MVT::i32, LHS, RHS, in LowerSELECT_CC()
2281 SDValue A64CMP = DAG.getNode(AArch64ISD::SETCC, dl, MVT::i32, TheBit, in LowerSELECT()
2540 SDValue CmpOp = DAG.getNode(AArch64ISD::SETCC, dl, MVT::i32, LHS, RHS, in LowerSETCC()
2662 case ISD::SETCC: return LowerSETCC(Op, DAG); in LowerOperation()