Lines Matching refs:Opc
482 enum OpcTypes { SBFM = 0, BFM, UBFM, Undef } Opc; in DecodeBitfieldInstruction() local
483 Opc = (OpcTypes)fieldFromInstruction(Insn, 29, 2); in DecodeBitfieldInstruction()
494 if (Opc == BFM) DecodeGPR64RegisterClass(Inst, Rd, Address, Decoder); in DecodeBitfieldInstruction()
499 if (Opc == BFM) DecodeGPR32RegisterClass(Inst, Rd, Address, Decoder); in DecodeBitfieldInstruction()
504 assert(!(ImmS == 31 && !SF && Opc != BFM) in DecodeBitfieldInstruction()
506 assert(!(ImmS == 63 && SF && Opc != BFM) in DecodeBitfieldInstruction()
510 if (Opc == SBFM && ImmR == 0) { in DecodeBitfieldInstruction()
513 } else if (Opc == UBFM && ImmR == 0) { in DecodeBitfieldInstruction()
517 if (Opc == UBFM) { in DecodeBitfieldInstruction()
534 switch (Opc) { in DecodeBitfieldInstruction()
598 unsigned Opc = fieldFromInstruction(Insn, 30, 2); in DecodeLDSTPairInstruction() local
624 switch (Opc) { in DecodeLDSTPairInstruction()
640 switch (Opc) { in DecodeLDSTPairInstruction()
759 unsigned Opc = fieldFromInstruction(Insn, 22, 2); in DecodeSingleIndexedInstruction() local
763 if (Opc == 0 || (V == 1 && Opc == 2)) { in DecodeSingleIndexedInstruction()
768 if (V == 0 && (Opc == 2 || Size == 3)) { in DecodeSingleIndexedInstruction()
772 } else if (V == 1 && (Opc & 2)) { in DecodeSingleIndexedInstruction()
791 if (Opc != 0 && (V != 1 || Opc != 2)) { in DecodeSingleIndexedInstruction()