157     MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(ARM::t2STRDi8));  in storeRegToStackSlot()  local
158     AddDReg(MIB, SrcReg, ARM::gsub_0, getKillRegState(isKill), TRI);  in storeRegToStackSlot()
159     AddDReg(MIB, SrcReg, ARM::gsub_1, 0, TRI);  in storeRegToStackSlot()
160     MIB.addFrameIndex(FI).addImm(0).addMemOperand(MMO);  in storeRegToStackSlot()
161     AddDefaultPred(MIB);  in storeRegToStackSlot()
198     MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(ARM::t2LDRDi8));  in loadRegFromStackSlot()  local
199     AddDReg(MIB, DestReg, ARM::gsub_0, RegState::DefineNoRead, TRI);  in loadRegFromStackSlot()
200     AddDReg(MIB, DestReg, ARM::gsub_1, RegState::DefineNoRead, TRI);  in loadRegFromStackSlot()
201     MIB.addFrameIndex(FI).addImm(0).addMemOperand(MMO);  in loadRegFromStackSlot()
202     AddDefaultPred(MIB);  in loadRegFromStackSlot()
205       MIB.addReg(DestReg, RegState::ImplicitDefine);  in loadRegFromStackSlot()
314     MachineInstrBuilder MIB =  in emitT2RegPlusImmediate()  local
319       AddDefaultCC(MIB);  in emitT2RegPlusImmediate()
446       MachineInstrBuilder MIB(*MI.getParent()->getParent(), &MI);  in rewriteT2FrameIndex()  local
447       AddDefaultPred(MIB);  in rewriteT2FrameIndex()