Lines Matching refs:OpNode
169 multiclass I3<string OpcStr, SDNode OpNode> {
172 [(set Int64Regs:$dst, (OpNode Int64Regs:$a,
176 [(set Int64Regs:$dst, (OpNode Int64Regs:$a, imm:$b))]>;
179 [(set Int32Regs:$dst, (OpNode Int32Regs:$a,
183 [(set Int32Regs:$dst, (OpNode Int32Regs:$a, imm:$b))]>;
186 [(set Int16Regs:$dst, (OpNode Int16Regs:$a,
190 [(set Int16Regs:$dst, (OpNode Int16Regs:$a, (imm):$b))]>;
193 multiclass ADD_SUB_INT_32<string OpcStr, SDNode OpNode> {
197 [(set Int32Regs:$dst, (OpNode Int32Regs:$a,
201 [(set Int32Regs:$dst, (OpNode Int32Regs:$a, imm:$b))]>;
204 multiclass F3<string OpcStr, SDNode OpNode> {
209 (OpNode Float64Regs:$a, Float64Regs:$b))]>,
215 (OpNode Float64Regs:$a, fpimm:$b))]>,
221 (OpNode Float32Regs:$a, Float32Regs:$b))]>,
227 (OpNode Float32Regs:$a, fpimm:$b))]>,
233 (OpNode Float32Regs:$a, Float32Regs:$b))]>,
239 (OpNode Float32Regs:$a, fpimm:$b))]>,
243 multiclass F3_rn<string OpcStr, SDNode OpNode> {
248 (OpNode Float64Regs:$a, Float64Regs:$b))]>;
253 (OpNode Float64Regs:$a, fpimm:$b))]>;
258 (OpNode Float32Regs:$a, Float32Regs:$b))]>,
264 (OpNode Float32Regs:$a, fpimm:$b))]>,
270 (OpNode Float32Regs:$a, Float32Regs:$b))]>;
275 (OpNode Float32Regs:$a, fpimm:$b))]>;
278 multiclass F2<string OpcStr, SDNode OpNode> {
281 [(set Float64Regs:$dst, (OpNode Float64Regs:$a))]>;
284 [(set Float32Regs:$dst, (OpNode Float32Regs:$a))]>,
288 [(set Float32Regs:$dst, (OpNode Float32Regs:$a))]>;
383 multiclass ADD_SUB_i1<SDNode OpNode> {
386 [(set Int1Regs:$dst, (OpNode Int1Regs:$a, Int1Regs:$b))]>;
389 [(set Int1Regs:$dst, (OpNode Int1Regs:$a, (imm):$b))]>;
951 multiclass LOG_FORMAT<string OpcStr, SDNode OpNode> {
954 [(set Int1Regs:$dst, (OpNode Int1Regs:$a, Int1Regs:$b))]>;
957 [(set Int1Regs:$dst, (OpNode Int1Regs:$a, imm:$b))]>;
960 [(set Int16Regs:$dst, (OpNode Int16Regs:$a,
964 [(set Int16Regs:$dst, (OpNode Int16Regs:$a, imm:$b))]>;
967 [(set Int32Regs:$dst, (OpNode Int32Regs:$a,
971 [(set Int32Regs:$dst, (OpNode Int32Regs:$a, imm:$b))]>;
974 [(set Int64Regs:$dst, (OpNode Int64Regs:$a,
978 [(set Int64Regs:$dst, (OpNode Int64Regs:$a, imm:$b))]>;
999 multiclass LSHIFT_FORMAT<string OpcStr, SDNode OpNode> {
1003 [(set Int64Regs:$dst, (OpNode Int64Regs:$a,
1007 [(set Int64Regs:$dst, (OpNode Int64Regs:$a,
1012 [(set Int32Regs:$dst, (OpNode Int32Regs:$a,
1016 [(set Int32Regs:$dst, (OpNode Int32Regs:$a,
1020 [(set Int32Regs:$dst, (OpNode (i32 imm:$a),
1025 [(set Int16Regs:$dst, (OpNode Int16Regs:$a,
1029 [(set Int16Regs:$dst, (OpNode Int16Regs:$a,
1037 multiclass RSHIFT_FORMAT<string OpcStr, SDNode OpNode> {
1041 [(set Int64Regs:$dst, (OpNode Int64Regs:$a,
1045 [(set Int64Regs:$dst, (OpNode Int64Regs:$a,
1050 [(set Int32Regs:$dst, (OpNode Int32Regs:$a,
1054 [(set Int32Regs:$dst, (OpNode Int32Regs:$a,
1058 [(set Int32Regs:$dst, (OpNode (i32 imm:$a),
1063 [(set Int16Regs:$dst, (OpNode Int16Regs:$a,
1067 [(set Int16Regs:$dst, (OpNode Int16Regs:$a,
1383 multiclass ISET_FORMAT<PatFrag OpNode, PatLeaf Mode,
1403 def : Pat<(i1 (OpNode Int16Regs:$a, Int16Regs:$b)),
1405 def : Pat<(i1 (OpNode Int16Regs:$a, imm:$b)),
1407 def : Pat<(i1 (OpNode imm:$a, Int16Regs:$b)),
1410 def : Pat<(i1 (OpNode Int32Regs:$a, Int32Regs:$b)),
1412 def : Pat<(i1 (OpNode Int32Regs:$a, imm:$b)),
1414 def : Pat<(i1 (OpNode imm:$a, Int32Regs:$b)),
1417 def : Pat<(i1 (OpNode Int64Regs:$a, Int64Regs:$b)),
1419 def : Pat<(i1 (OpNode Int64Regs:$a, imm:$b)),
1421 def : Pat<(i1 (OpNode imm:$a, Int64Regs:$b)),
1425 def : Pat<(i32 (OpNode Int16Regs:$a, Int16Regs:$b)),
1427 def : Pat<(i32 (OpNode Int16Regs:$a, imm:$b)),
1429 def : Pat<(i32 (OpNode imm:$a, Int16Regs:$b)),
1432 def : Pat<(i32 (OpNode Int32Regs:$a, Int32Regs:$b)),
1434 def : Pat<(i32 (OpNode Int32Regs:$a, imm:$b)),
1436 def : Pat<(i32 (OpNode imm:$a, Int32Regs:$b)),
1439 def : Pat<(i32 (OpNode Int64Regs:$a, Int64Regs:$b)),
1441 def : Pat<(i32 (OpNode Int64Regs:$a, imm:$b)),
1443 def : Pat<(i32 (OpNode imm:$a, Int64Regs:$b)),
1447 multiclass ISET_FORMAT_SIGNED<PatFrag OpNode, PatLeaf Mode>
1448 : ISET_FORMAT<OpNode, Mode,
1459 multiclass ISET_FORMAT_UNSIGNED<PatFrag OpNode, PatLeaf Mode>
1460 : ISET_FORMAT<OpNode, Mode,
1503 multiclass FSET_FORMAT<PatFrag OpNode, PatLeaf Mode, PatLeaf ModeFTZ> {
1505 def : Pat<(i1 (OpNode Float32Regs:$a, Float32Regs:$b)),
1508 def : Pat<(i1 (OpNode Float32Regs:$a, Float32Regs:$b)),
1510 def : Pat<(i1 (OpNode Float32Regs:$a, fpimm:$b)),
1513 def : Pat<(i1 (OpNode Float32Regs:$a, fpimm:$b)),
1515 def : Pat<(i1 (OpNode fpimm:$a, Float32Regs:$b)),
1518 def : Pat<(i1 (OpNode fpimm:$a, Float32Regs:$b)),
1522 def : Pat<(i1 (OpNode Float64Regs:$a, Float64Regs:$b)),
1524 def : Pat<(i1 (OpNode Float64Regs:$a, fpimm:$b)),
1526 def : Pat<(i1 (OpNode fpimm:$a, Float64Regs:$b)),
1530 def : Pat<(i32 (OpNode Float32Regs:$a, Float32Regs:$b)),
1533 def : Pat<(i32 (OpNode Float32Regs:$a, Float32Regs:$b)),
1535 def : Pat<(i32 (OpNode Float32Regs:$a, fpimm:$b)),
1538 def : Pat<(i32 (OpNode Float32Regs:$a, fpimm:$b)),
1540 def : Pat<(i32 (OpNode fpimm:$a, Float32Regs:$b)),
1543 def : Pat<(i32 (OpNode fpimm:$a, Float32Regs:$b)),
1547 def : Pat<(i32 (OpNode Float64Regs:$a, Float64Regs:$b)),
1549 def : Pat<(i32 (OpNode Float64Regs:$a, fpimm:$b)),
1551 def : Pat<(i32 (OpNode fpimm:$a, Float64Regs:$b)),