48 isImplicitlyDef(MachineRegisterInfo &MRI, unsigned Reg) {  in isImplicitlyDef()  argument
49   for (MachineRegisterInfo::def_iterator It = MRI.def_begin(Reg),  in isImplicitlyDef()
50       E = MRI.def_end(); It != E; ++It) {  in isImplicitlyDef()
62   RegSeqInfo(MachineRegisterInfo &MRI, MachineInstr *MI) : Instr(MI) {  in RegSeqInfo()  argument
67       if (isImplicitlyDef(MRI, MO.getReg()))  in RegSeqInfo()
82   MachineRegisterInfo *MRI;  member in __anonc979ecad0111::R600VectorRegMerger
186     unsigned DstReg = MRI->createVirtualRegister(&AMDGPU::R600_Reg128RegClass);  in RebuildVector()
213   for (MachineRegisterInfo::use_iterator It = MRI->use_begin(Reg),  in RebuildVector()
214       E = MRI->use_end(); It != E; ++It) {  in RebuildVector()
261   for (MachineRegisterInfo::use_iterator It = MRI->use_begin(Reg),  in areAllUsesSwizzeable()
262       E = MRI->use_end(); It != E; ++It) {  in areAllUsesSwizzeable()
314   MRI = &(Fn.getRegInfo());  in runOnMachineFunction()
328           for (MachineRegisterInfo::def_iterator It = MRI->def_begin(Reg),  in runOnMachineFunction()
329               E = MRI->def_end(); It != E; ++It) {  in runOnMachineFunction()
337       RegSeqInfo RSI(*MRI, MI);  in runOnMachineFunction()