Lines Matching refs:Inst
29 field bits<32> Inst;
36 field bits<64> Inst;
50 let Inst{7-0} = SSRC0;
51 let Inst{15-8} = op;
52 let Inst{22-16} = SDST;
53 let Inst{31-23} = 0x17d; //encoding;
67 let Inst{7-0} = SSRC0;
68 let Inst{15-8} = SSRC1;
69 let Inst{22-16} = SDST;
70 let Inst{29-23} = op;
71 let Inst{31-30} = 0x2; // encoding
84 let Inst{7-0} = SSRC0;
85 let Inst{15-8} = SSRC1;
86 let Inst{22-16} = op;
87 let Inst{31-23} = 0x17e;
101 let Inst{15-0} = SIMM16;
102 let Inst{22-16} = SDST;
103 let Inst{27-23} = op;
104 let Inst{31-28} = 0xb; //encoding
119 let Inst{15-0} = SIMM16;
120 let Inst{22-16} = op;
121 let Inst{31-23} = 0x17f; // encoding
135 let Inst{7-0} = OFFSET;
136 let Inst{8} = imm;
137 let Inst{14-9} = SBASE{6-1};
138 let Inst{21-15} = SDST;
139 let Inst{26-22} = op;
140 let Inst{31-27} = 0x18; //encoding
157 let Inst{8-0} = SRC0;
158 let Inst{16-9} = op;
159 let Inst{24-17} = VDST;
160 let Inst{31-25} = 0x3f; //encoding
174 let Inst{8-0} = SRC0;
175 let Inst{16-9} = VSRC1;
176 let Inst{24-17} = VDST;
177 let Inst{30-25} = op;
178 let Inst{31} = 0x0; //encoding
197 let Inst{7-0} = dst;
198 let Inst{10-8} = abs;
199 let Inst{11} = clamp;
200 let Inst{25-17} = op;
201 let Inst{31-26} = 0x34; //encoding
202 let Inst{40-32} = src0;
203 let Inst{49-41} = src1;
204 let Inst{58-50} = src2;
205 let Inst{60-59} = omod;
206 let Inst{63-61} = neg;
224 let Inst{7-0} = dst;
225 let Inst{14-8} = sdst;
226 let Inst{25-17} = op;
227 let Inst{31-26} = 0x34; //encoding
228 let Inst{40-32} = src0;
229 let Inst{49-41} = src1;
230 let Inst{58-50} = src2;
231 let Inst{60-59} = omod;
232 let Inst{63-61} = neg;
245 let Inst{8-0} = SRC0;
246 let Inst{16-9} = VSRC1;
247 let Inst{24-17} = op;
248 let Inst{31-25} = 0x3e;
264 let Inst{7-0} = VSRC;
265 let Inst{9-8} = ATTRCHAN;
266 let Inst{15-10} = ATTR;
267 let Inst{17-16} = op;
268 let Inst{25-18} = VDST;
269 let Inst{31-26} = 0x32; // encoding
295 let Inst{7-0} = offset0;
296 let Inst{15-8} = offset1;
297 let Inst{17} = gds;
298 let Inst{25-18} = op;
299 let Inst{31-26} = 0x36; //encoding
300 let Inst{39-32} = addr;
301 let Inst{47-40} = data0;
302 let Inst{55-48} = data1;
303 let Inst{63-56} = vdst;
324 let Inst{11-0} = offset;
325 let Inst{12} = offen;
326 let Inst{13} = idxen;
327 let Inst{14} = glc;
328 let Inst{15} = addr64;
329 let Inst{16} = lds;
330 let Inst{24-18} = op;
331 let Inst{31-26} = 0x38; //encoding
332 let Inst{39-32} = vaddr;
333 let Inst{47-40} = vdata;
334 let Inst{52-48} = srsrc{6-2};
335 let Inst{54} = slc;
336 let Inst{55} = tfe;
337 let Inst{63-56} = soffset;
362 let Inst{11-0} = OFFSET;
363 let Inst{12} = OFFEN;
364 let Inst{13} = IDXEN;
365 let Inst{14} = GLC;
366 let Inst{15} = ADDR64;
367 let Inst{18-16} = op;
368 let Inst{22-19} = DFMT;
369 let Inst{25-23} = NFMT;
370 let Inst{31-26} = 0x3a; //encoding
371 let Inst{39-32} = VADDR;
372 let Inst{47-40} = VDATA;
373 let Inst{52-48} = SRSRC{6-2};
374 let Inst{54} = SLC;
375 let Inst{55} = TFE;
376 let Inst{63-56} = SOFFSET;
400 let Inst{11-8} = DMASK;
401 let Inst{12} = UNORM;
402 let Inst{13} = GLC;
403 let Inst{14} = DA;
404 let Inst{15} = R128;
405 let Inst{16} = TFE;
406 let Inst{17} = LWE;
407 let Inst{24-18} = op;
408 let Inst{25} = SLC;
409 let Inst{31-26} = 0x3c;
410 let Inst{39-32} = VADDR;
411 let Inst{47-40} = VDATA;
412 let Inst{52-48} = SRSRC{6-2};
413 let Inst{57-53} = SSAMP{6-2};
436 let Inst{3-0} = EN;
437 let Inst{9-4} = TGT;
438 let Inst{10} = COMPR;
439 let Inst{11} = DONE;
440 let Inst{12} = VM;
441 let Inst{31-26} = 0x3e;
442 let Inst{39-32} = VSRC0;
443 let Inst{47-40} = VSRC1;
444 let Inst{55-48} = VSRC2;
445 let Inst{63-56} = VSRC3;