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Lines Matching defs:Mask

2854   const uint32_t *Mask = TRI->getCallPreservedMask(CallConv);  in LowerCall()  local
3524 static bool isSequentialOrUndefInRange(ArrayRef<int> Mask, in isSequentialOrUndefInRange()
3535 static bool isPSHUFDMask(ArrayRef<int> Mask, EVT VT) { in isPSHUFDMask()
3545 static bool isPSHUFHWMask(ArrayRef<int> Mask, EVT VT, bool HasInt256) { in isPSHUFHWMask()
3574 static bool isPSHUFLWMask(ArrayRef<int> Mask, EVT VT, bool HasInt256) { in isPSHUFLWMask()
3603 static bool isPALIGNRMask(ArrayRef<int> Mask, EVT VT, in isPALIGNRMask()
3676 static void CommuteVectorShuffleMask(SmallVectorImpl<int> &Mask, in CommuteVectorShuffleMask()
3693 static bool isSHUFPMask(ArrayRef<int> Mask, EVT VT, bool HasFp256, in isSHUFPMask()
3746 static bool isMOVHLPSMask(ArrayRef<int> Mask, EVT VT) { in isMOVHLPSMask()
3765 static bool isMOVHLPS_v_undef_Mask(ArrayRef<int> Mask, EVT VT) { in isMOVHLPS_v_undef_Mask()
3782 static bool isMOVLPMask(ArrayRef<int> Mask, EVT VT) { in isMOVLPMask()
3804 static bool isMOVLHPSMask(ArrayRef<int> Mask, EVT VT) { in isMOVLHPSMask()
3836 ArrayRef<int> Mask = SVOp->getMask(); in Compact8x32ShuffleNode() local
3873 static bool isUNPCKLMask(ArrayRef<int> Mask, EVT VT, in isUNPCKLMask()
3910 static bool isUNPCKHMask(ArrayRef<int> Mask, EVT VT, in isUNPCKHMask()
3947 static bool isUNPCKL_v_undef_Mask(ArrayRef<int> Mask, EVT VT, bool HasInt256) { in isUNPCKL_v_undef_Mask()
3988 static bool isUNPCKH_v_undef_Mask(ArrayRef<int> Mask, EVT VT, bool HasInt256) { in isUNPCKH_v_undef_Mask()
4019 static bool isMOVLMask(ArrayRef<int> Mask, EVT VT) { in isMOVLMask()
4043 static bool isVPERM2X128Mask(ArrayRef<int> Mask, EVT VT, bool HasFp256) { in isVPERM2X128Mask()
4103 static bool isVPERMILPMask(ArrayRef<int> Mask, EVT VT, bool HasFp256) { in isVPERMILPMask()
4134 static bool isCommutedMOVLMask(ArrayRef<int> Mask, EVT VT, in isCommutedMOVLMask()
4158 static bool isMOVSHDUPMask(ArrayRef<int> Mask, EVT VT, in isMOVSHDUPMask()
4181 static bool isMOVSLDUPMask(ArrayRef<int> Mask, EVT VT, in isMOVSLDUPMask()
4204 static bool isMOVDDUPYMask(ArrayRef<int> Mask, EVT VT, bool HasFp256) { in isMOVDDUPYMask()
4224 static bool isMOVDDUPMask(ArrayRef<int> Mask, EVT VT) { in isMOVDDUPMask()
4310 unsigned Mask = 0; in getShuffleSHUFImmediate() local
4332 unsigned Mask = 0; in getShufflePSHUFHWImmediate() local
4356 unsigned Mask = 0; in getShufflePSHUFLWImmediate() local
4463 unsigned Mask = 0; in getShuffleCLImmediate() local
4509 static bool ShouldXformToMOVHLPS(ArrayRef<int> Mask, EVT VT) { in ShouldXformToMOVHLPS()
4566 ArrayRef<int> Mask, EVT VT) { in ShouldXformToMOVLP()
4697 static void NormalizeMask(SmallVectorImpl<int> &Mask, unsigned NumElems) { in NormalizeMask()
4710 SmallVector<int, 8> Mask; in getMOVL() local
4721 SmallVector<int, 8> Mask; in getUnpackl() local
4733 SmallVector<int, 8> Mask; in getUnpackh() local
4850 SmallVectorImpl<int> &Mask, bool &IsUnary) { in getTargetShuffleMask()
5291 SmallVector<int, 8> Mask(NumElems, EltNo); in LowerAsSplatVectorLoad() local
5545 SmallVector<int, 8> Mask(NumElems, -1); in buildFromShuffleMostly() local
5797 SmallVector<int, 4> Mask; in LowerBUILD_VECTOR() local
6654 SmallVector<int, 16> Mask; in LowerVECTOR_SHUFFLE_256() local
7045 unsigned Mask = (1U << Shift) - 1; in LowerVectorIntExtend() local
7421 SDValue Mask = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v8i32, in LowerVECTOR_SHUFFLE() local
7594 int Mask[4] = { static_cast<int>(Idx), -1, -1, -1 }; in LowerEXTRACT_VECTOR_ELT() local
7613 int Mask[2] = { 1, -1 }; in LowerEXTRACT_VECTOR_ELT() local
8827 static const int Mask[] = {4, 5, 6, 7, -1, -1, -1, -1}; in LowerZERO_EXTEND() local
9030 SDValue Mask = DAG.getLoad(VT, dl, DAG.getEntryNode(), CPIdx, in LowerFABS() local
9064 SDValue Mask = DAG.getLoad(VT, dl, DAG.getEntryNode(), CPIdx, in LowerFNEG() local
9810 static const int Mask[] = { 1, 0, 3, 2 }; in LowerVSETCC() local
12061 SDValue Mask = DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &V[0], 16); in LowerScalarImmediateShift() local
12105 SDValue Mask = DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &V[0], 32); in LowerScalarImmediateShift() local
13445 X86TargetLowering::isVectorClearMaskLegal(const SmallVectorImpl<int> &Mask, in isVectorClearMaskLegal()
16716 APInt Mask = cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue(); in PerformSHLCombine() local
16969 APInt Mask = APInt::getAllOnesValue(InBits); in WidenMaskArithmetic() local
17075 SDValue Mask = N1.getOperand(0); in PerformOrCombine() local
17762 ArrayRef<int> Mask = cast<ShuffleVectorSDNode>(LHS.getNode())->getMask(); in isHorizontalBinOp() local
17780 ArrayRef<int> Mask = cast<ShuffleVectorSDNode>(RHS.getNode())->getMask(); in isHorizontalBinOp() local