Lines Matching refs:v16f32

1302     addRegisterClass(MVT::v16f32, &X86::VR512RegClass);  in resetOperationActions()
1310     setOperationAction(ISD::LOAD,               MVT::v16f32, Legal);  in resetOperationActions()
1316     setOperationAction(ISD::FADD,               MVT::v16f32, Legal);  in resetOperationActions()
1317     setOperationAction(ISD::FSUB,               MVT::v16f32, Legal);  in resetOperationActions()
1318     setOperationAction(ISD::FMUL,               MVT::v16f32, Legal);  in resetOperationActions()
1319     setOperationAction(ISD::FDIV,               MVT::v16f32, Legal);  in resetOperationActions()
1320     setOperationAction(ISD::FSQRT,              MVT::v16f32, Legal);  in resetOperationActions()
1321     setOperationAction(ISD::FNEG,               MVT::v16f32, Custom);  in resetOperationActions()
1330     setOperationAction(ISD::FMA,                MVT::v16f32, Legal);  in resetOperationActions()
1358     setOperationAction(ISD::CONCAT_VECTORS,     MVT::v16f32,  Custom);  in resetOperationActions()
1371     setOperationAction(ISD::SELECT,             MVT::v16f32, Custom);  in resetOperationActions()
19013       case MVT::v16f32:  in getRegForInlineAsmConstraint()