Lines Matching refs:v8f64

1304     addRegisterClass(MVT::v8f64,  &X86::VR512RegClass);  in resetOperationActions()
1311     setOperationAction(ISD::LOAD,               MVT::v8f64, Legal);  in resetOperationActions()
1323     setOperationAction(ISD::FADD,               MVT::v8f64, Legal);  in resetOperationActions()
1324     setOperationAction(ISD::FSUB,               MVT::v8f64, Legal);  in resetOperationActions()
1325     setOperationAction(ISD::FMUL,               MVT::v8f64, Legal);  in resetOperationActions()
1326     setOperationAction(ISD::FDIV,               MVT::v8f64, Legal);  in resetOperationActions()
1327     setOperationAction(ISD::FSQRT,              MVT::v8f64, Legal);  in resetOperationActions()
1328     setOperationAction(ISD::FNEG,               MVT::v8f64, Custom);  in resetOperationActions()
1329     setOperationAction(ISD::FMA,                MVT::v8f64, Legal);  in resetOperationActions()
1356     setOperationAction(ISD::CONCAT_VECTORS,     MVT::v8f64,  Custom);  in resetOperationActions()
1369     setOperationAction(ISD::SELECT,             MVT::v8f64, Custom);  in resetOperationActions()
19012       case MVT::v8f64:  in getRegForInlineAsmConstraint()