Lines Matching refs:insn
852 static inline void gen_add_data_offset(DisasContext *s, unsigned int insn, in gen_add_data_offset() argument
858 if (!(insn & (1 << 25))) { in gen_add_data_offset()
860 val = insn & 0xfff; in gen_add_data_offset()
861 if (!(insn & (1 << 23))) in gen_add_data_offset()
867 rm = (insn) & 0xf; in gen_add_data_offset()
868 shift = (insn >> 7) & 0x1f; in gen_add_data_offset()
869 shiftop = (insn >> 5) & 3; in gen_add_data_offset()
872 if (!(insn & (1 << 23))) in gen_add_data_offset()
880 static inline void gen_add_datah_offset(DisasContext *s, unsigned int insn, in gen_add_datah_offset() argument
886 if (insn & (1 << 22)) { in gen_add_datah_offset()
888 val = (insn & 0xf) | ((insn >> 4) & 0xf0); in gen_add_datah_offset()
889 if (!(insn & (1 << 23))) in gen_add_datah_offset()
898 rm = (insn) & 0xf; in gen_add_datah_offset()
900 if (!(insn & (1 << 23))) in gen_add_datah_offset()
1320 static inline int gen_iwmmxt_address(DisasContext *s, uint32_t insn, TCGv dest) in gen_iwmmxt_address() argument
1326 rd = (insn >> 16) & 0xf; in gen_iwmmxt_address()
1329 offset = (insn & 0xff) << ((insn >> 7) & 2); in gen_iwmmxt_address()
1330 if (insn & (1 << 24)) { in gen_iwmmxt_address()
1332 if (insn & (1 << 23)) in gen_iwmmxt_address()
1337 if (insn & (1 << 21)) in gen_iwmmxt_address()
1341 } else if (insn & (1 << 21)) { in gen_iwmmxt_address()
1344 if (insn & (1 << 23)) in gen_iwmmxt_address()
1349 } else if (!(insn & (1 << 23))) in gen_iwmmxt_address()
1354 static inline int gen_iwmmxt_shift(uint32_t insn, uint32_t mask, TCGv dest) in gen_iwmmxt_shift() argument
1356 int rd = (insn >> 0) & 0xf; in gen_iwmmxt_shift()
1359 if (insn & (1 << 8)) { in gen_iwmmxt_shift()
1378 static int disas_iwmmxt_insn(CPUState *env, DisasContext *s, uint32_t insn) in disas_iwmmxt_insn() argument
1385 if ((insn & 0x0e000e00) == 0x0c000000) { in disas_iwmmxt_insn()
1386 if ((insn & 0x0fe00ff0) == 0x0c400000) { in disas_iwmmxt_insn()
1387 wrd = insn & 0xf; in disas_iwmmxt_insn()
1388 rdlo = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
1389 rdhi = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
1390 if (insn & ARM_CP_RW_BIT) { /* TMRRC */ in disas_iwmmxt_insn()
1403 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
1405 if (gen_iwmmxt_address(s, insn, addr)) { in disas_iwmmxt_insn()
1409 if (insn & ARM_CP_RW_BIT) { in disas_iwmmxt_insn()
1410 if ((insn >> 28) == 0xf) { /* WLDRW wCx */ in disas_iwmmxt_insn()
1416 if (insn & (1 << 8)) { in disas_iwmmxt_insn()
1417 if (insn & (1 << 22)) { /* WLDRD */ in disas_iwmmxt_insn()
1424 if (insn & (1 << 22)) { /* WLDRH */ in disas_iwmmxt_insn()
1437 if ((insn >> 28) == 0xf) { /* WSTRW wCx */ in disas_iwmmxt_insn()
1443 if (insn & (1 << 8)) { in disas_iwmmxt_insn()
1444 if (insn & (1 << 22)) { /* WSTRD */ in disas_iwmmxt_insn()
1452 if (insn & (1 << 22)) { /* WSTRH */ in disas_iwmmxt_insn()
1466 if ((insn & 0x0f000000) != 0x0e000000) in disas_iwmmxt_insn()
1469 switch (((insn >> 12) & 0xf00) | ((insn >> 4) & 0xff)) { in disas_iwmmxt_insn()
1471 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
1472 rd0 = (insn >> 0) & 0xf; in disas_iwmmxt_insn()
1473 rd1 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
1482 if (insn & 0xf) in disas_iwmmxt_insn()
1484 rd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
1485 wrd = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
1513 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
1514 rd0 = (insn >> 0) & 0xf; in disas_iwmmxt_insn()
1515 rd1 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
1524 if (insn & 0xf) in disas_iwmmxt_insn()
1526 rd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
1527 wrd = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
1532 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
1533 rd0 = (insn >> 0) & 0xf; in disas_iwmmxt_insn()
1534 rd1 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
1544 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
1545 rd0 = (insn >> 0) & 0xf; in disas_iwmmxt_insn()
1546 rd1 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
1555 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
1556 rd0 = (insn >> 0) & 0xf; in disas_iwmmxt_insn()
1557 rd1 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
1559 if (insn & (1 << 21)) in disas_iwmmxt_insn()
1567 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
1568 rd0 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
1569 rd1 = (insn >> 0) & 0xf; in disas_iwmmxt_insn()
1571 switch ((insn >> 22) & 3) { in disas_iwmmxt_insn()
1589 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
1590 rd0 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
1591 rd1 = (insn >> 0) & 0xf; in disas_iwmmxt_insn()
1593 switch ((insn >> 22) & 3) { in disas_iwmmxt_insn()
1611 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
1612 rd0 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
1613 rd1 = (insn >> 0) & 0xf; in disas_iwmmxt_insn()
1615 if (insn & (1 << 22)) in disas_iwmmxt_insn()
1619 if (!(insn & (1 << 20))) in disas_iwmmxt_insn()
1625 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
1626 rd0 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
1627 rd1 = (insn >> 0) & 0xf; in disas_iwmmxt_insn()
1629 if (insn & (1 << 21)) { in disas_iwmmxt_insn()
1630 if (insn & (1 << 20)) in disas_iwmmxt_insn()
1635 if (insn & (1 << 20)) in disas_iwmmxt_insn()
1644 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
1645 rd0 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
1646 rd1 = (insn >> 0) & 0xf; in disas_iwmmxt_insn()
1648 if (insn & (1 << 21)) in disas_iwmmxt_insn()
1652 if (!(insn & (1 << 20))) { in disas_iwmmxt_insn()
1660 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
1661 rd0 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
1662 rd1 = (insn >> 0) & 0xf; in disas_iwmmxt_insn()
1664 switch ((insn >> 22) & 3) { in disas_iwmmxt_insn()
1682 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
1683 rd0 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
1684 rd1 = (insn >> 0) & 0xf; in disas_iwmmxt_insn()
1686 if (insn & (1 << 22)) { in disas_iwmmxt_insn()
1687 if (insn & (1 << 20)) in disas_iwmmxt_insn()
1692 if (insn & (1 << 20)) in disas_iwmmxt_insn()
1702 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
1703 rd0 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
1704 rd1 = (insn >> 0) & 0xf; in disas_iwmmxt_insn()
1706 tmp = iwmmxt_load_creg(ARM_IWMMXT_wCGR0 + ((insn >> 20) & 3)); in disas_iwmmxt_insn()
1715 if (((insn >> 6) & 3) == 3) in disas_iwmmxt_insn()
1717 rd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
1718 wrd = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
1721 switch ((insn >> 6) & 3) { in disas_iwmmxt_insn()
1724 tmp3 = tcg_const_i32((insn & 7) << 3); in disas_iwmmxt_insn()
1728 tmp3 = tcg_const_i32((insn & 3) << 4); in disas_iwmmxt_insn()
1732 tmp3 = tcg_const_i32((insn & 1) << 5); in disas_iwmmxt_insn()
1746 rd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
1747 wrd = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
1748 if (rd == 15 || ((insn >> 22) & 3) == 3) in disas_iwmmxt_insn()
1752 switch ((insn >> 22) & 3) { in disas_iwmmxt_insn()
1754 tcg_gen_shri_i64(cpu_M0, cpu_M0, (insn & 7) << 3); in disas_iwmmxt_insn()
1756 if (insn & 8) { in disas_iwmmxt_insn()
1763 tcg_gen_shri_i64(cpu_M0, cpu_M0, (insn & 3) << 4); in disas_iwmmxt_insn()
1765 if (insn & 8) { in disas_iwmmxt_insn()
1772 tcg_gen_shri_i64(cpu_M0, cpu_M0, (insn & 1) << 5); in disas_iwmmxt_insn()
1779 if ((insn & 0x000ff008) != 0x0003f000 || ((insn >> 22) & 3) == 3) in disas_iwmmxt_insn()
1782 switch ((insn >> 22) & 3) { in disas_iwmmxt_insn()
1784 tcg_gen_shri_i32(tmp, tmp, ((insn & 7) << 2) + 0); in disas_iwmmxt_insn()
1787 tcg_gen_shri_i32(tmp, tmp, ((insn & 3) << 3) + 4); in disas_iwmmxt_insn()
1790 tcg_gen_shri_i32(tmp, tmp, ((insn & 1) << 4) + 12); in disas_iwmmxt_insn()
1798 if (((insn >> 6) & 3) == 3) in disas_iwmmxt_insn()
1800 rd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
1801 wrd = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
1803 switch ((insn >> 6) & 3) { in disas_iwmmxt_insn()
1819 if ((insn & 0x000ff00f) != 0x0003f000 || ((insn >> 22) & 3) == 3) in disas_iwmmxt_insn()
1824 switch ((insn >> 22) & 3) { in disas_iwmmxt_insn()
1847 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
1848 rd0 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
1850 switch ((insn >> 22) & 3) { in disas_iwmmxt_insn()
1867 if ((insn & 0x000ff00f) != 0x0003f000 || ((insn >> 22) & 3) == 3) in disas_iwmmxt_insn()
1872 switch ((insn >> 22) & 3) { in disas_iwmmxt_insn()
1895 rd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
1896 rd0 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
1897 if ((insn & 0xf) != 0 || ((insn >> 22) & 3) == 3) in disas_iwmmxt_insn()
1901 switch ((insn >> 22) & 3) { in disas_iwmmxt_insn()
1916 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
1917 rd0 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
1918 rd1 = (insn >> 0) & 0xf; in disas_iwmmxt_insn()
1920 switch ((insn >> 22) & 3) { in disas_iwmmxt_insn()
1922 if (insn & (1 << 21)) in disas_iwmmxt_insn()
1928 if (insn & (1 << 21)) in disas_iwmmxt_insn()
1934 if (insn & (1 << 21)) in disas_iwmmxt_insn()
1948 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
1949 rd0 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
1951 switch ((insn >> 22) & 3) { in disas_iwmmxt_insn()
1953 if (insn & (1 << 21)) in disas_iwmmxt_insn()
1959 if (insn & (1 << 21)) in disas_iwmmxt_insn()
1965 if (insn & (1 << 21)) in disas_iwmmxt_insn()
1979 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
1980 rd0 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
1982 switch ((insn >> 22) & 3) { in disas_iwmmxt_insn()
1984 if (insn & (1 << 21)) in disas_iwmmxt_insn()
1990 if (insn & (1 << 21)) in disas_iwmmxt_insn()
1996 if (insn & (1 << 21)) in disas_iwmmxt_insn()
2010 if (((insn >> 22) & 3) == 0) in disas_iwmmxt_insn()
2012 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
2013 rd0 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
2016 if (gen_iwmmxt_shift(insn, 0xff, tmp)) { in disas_iwmmxt_insn()
2020 switch ((insn >> 22) & 3) { in disas_iwmmxt_insn()
2038 if (((insn >> 22) & 3) == 0) in disas_iwmmxt_insn()
2040 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
2041 rd0 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
2044 if (gen_iwmmxt_shift(insn, 0xff, tmp)) { in disas_iwmmxt_insn()
2048 switch ((insn >> 22) & 3) { in disas_iwmmxt_insn()
2066 if (((insn >> 22) & 3) == 0) in disas_iwmmxt_insn()
2068 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
2069 rd0 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
2072 if (gen_iwmmxt_shift(insn, 0xff, tmp)) { in disas_iwmmxt_insn()
2076 switch ((insn >> 22) & 3) { in disas_iwmmxt_insn()
2094 if (((insn >> 22) & 3) == 0) in disas_iwmmxt_insn()
2096 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
2097 rd0 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
2100 switch ((insn >> 22) & 3) { in disas_iwmmxt_insn()
2102 if (gen_iwmmxt_shift(insn, 0xf, tmp)) { in disas_iwmmxt_insn()
2109 if (gen_iwmmxt_shift(insn, 0x1f, tmp)) { in disas_iwmmxt_insn()
2116 if (gen_iwmmxt_shift(insn, 0x3f, tmp)) { in disas_iwmmxt_insn()
2130 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
2131 rd0 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
2132 rd1 = (insn >> 0) & 0xf; in disas_iwmmxt_insn()
2134 switch ((insn >> 22) & 3) { in disas_iwmmxt_insn()
2136 if (insn & (1 << 21)) in disas_iwmmxt_insn()
2142 if (insn & (1 << 21)) in disas_iwmmxt_insn()
2148 if (insn & (1 << 21)) in disas_iwmmxt_insn()
2161 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
2162 rd0 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
2163 rd1 = (insn >> 0) & 0xf; in disas_iwmmxt_insn()
2165 switch ((insn >> 22) & 3) { in disas_iwmmxt_insn()
2167 if (insn & (1 << 21)) in disas_iwmmxt_insn()
2173 if (insn & (1 << 21)) in disas_iwmmxt_insn()
2179 if (insn & (1 << 21)) in disas_iwmmxt_insn()
2192 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
2193 rd0 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
2194 rd1 = (insn >> 0) & 0xf; in disas_iwmmxt_insn()
2196 tmp = tcg_const_i32((insn >> 20) & 3); in disas_iwmmxt_insn()
2207 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
2208 rd0 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
2209 rd1 = (insn >> 0) & 0xf; in disas_iwmmxt_insn()
2211 switch ((insn >> 20) & 0xf) { in disas_iwmmxt_insn()
2250 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
2251 rd0 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
2253 tmp = tcg_const_i32(((insn >> 16) & 0xf0) | (insn & 0x0f)); in disas_iwmmxt_insn()
2264 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
2265 rd0 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
2266 rd1 = (insn >> 0) & 0xf; in disas_iwmmxt_insn()
2268 switch ((insn >> 20) & 0xf) { in disas_iwmmxt_insn()
2307 if (!(insn & (1 << 20)) || ((insn >> 22) & 3) == 0) in disas_iwmmxt_insn()
2309 wrd = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
2310 rd0 = (insn >> 16) & 0xf; in disas_iwmmxt_insn()
2311 rd1 = (insn >> 0) & 0xf; in disas_iwmmxt_insn()
2313 switch ((insn >> 22) & 3) { in disas_iwmmxt_insn()
2315 if (insn & (1 << 21)) in disas_iwmmxt_insn()
2321 if (insn & (1 << 21)) in disas_iwmmxt_insn()
2327 if (insn & (1 << 21)) in disas_iwmmxt_insn()
2341 wrd = (insn >> 5) & 0xf; in disas_iwmmxt_insn()
2342 rd0 = (insn >> 12) & 0xf; in disas_iwmmxt_insn()
2343 rd1 = (insn >> 0) & 0xf; in disas_iwmmxt_insn()
2349 switch ((insn >> 16) & 0xf) { in disas_iwmmxt_insn()
2357 if (insn & (1 << 16)) in disas_iwmmxt_insn()
2359 if (insn & (1 << 17)) in disas_iwmmxt_insn()
2382 static int disas_dsp_insn(CPUState *env, DisasContext *s, uint32_t insn) in disas_dsp_insn() argument
2387 if ((insn & 0x0ff00f10) == 0x0e200010) { in disas_dsp_insn()
2389 rd0 = (insn >> 12) & 0xf; in disas_dsp_insn()
2390 rd1 = insn & 0xf; in disas_dsp_insn()
2391 acc = (insn >> 5) & 7; in disas_dsp_insn()
2398 switch ((insn >> 16) & 0xf) { in disas_dsp_insn()
2409 if (insn & (1 << 16)) in disas_dsp_insn()
2411 if (insn & (1 << 17)) in disas_dsp_insn()
2425 if ((insn & 0x0fe00ff8) == 0x0c400000) { in disas_dsp_insn()
2427 rdhi = (insn >> 16) & 0xf; in disas_dsp_insn()
2428 rdlo = (insn >> 12) & 0xf; in disas_dsp_insn()
2429 acc = insn & 7; in disas_dsp_insn()
2434 if (insn & ARM_CP_RW_BIT) { /* MRA */ in disas_dsp_insn()
2452 static int disas_cp_insn(CPUState *env, DisasContext *s, uint32_t insn) in disas_cp_insn() argument
2455 uint32_t rd = (insn >> 12) & 0xf; in disas_cp_insn()
2456 uint32_t cp = (insn >> 8) & 0xf; in disas_cp_insn()
2458 if (insn & ARM_CP_RW_BIT) { in disas_cp_insn()
2463 tmp2 = tcg_const_i32(insn); in disas_cp_insn()
2472 tmp2 = tcg_const_i32(insn); in disas_cp_insn()
2480 static int cp15_user_ok(uint32_t insn) in cp15_user_ok() argument
2482 int cpn = (insn >> 16) & 0xf; in cp15_user_ok()
2483 int cpm = insn & 0xf; in cp15_user_ok()
2484 int op = ((insn >> 5) & 7) | ((insn >> 18) & 0x38); in cp15_user_ok()
2488 if (op == 2 || (op == 3 && (insn & ARM_CP_RW_BIT))) in cp15_user_ok()
2500 static int cp15_tls_load_store(CPUState *env, DisasContext *s, uint32_t insn, uint32_t rd) in cp15_tls_load_store() argument
2503 int cpn = (insn >> 16) & 0xf; in cp15_tls_load_store()
2504 int cpm = insn & 0xf; in cp15_tls_load_store()
2505 int op = ((insn >> 5) & 7) | ((insn >> 18) & 0x38); in cp15_tls_load_store()
2513 if (insn & ARM_CP_RW_BIT) { in cp15_tls_load_store()
2551 static int disas_cp15_insn(CPUState *env, DisasContext *s, uint32_t insn) in disas_cp15_insn() argument
2560 if ((insn & (1 << 25)) == 0) { in disas_cp15_insn()
2561 if (insn & (1 << 20)) { in disas_cp15_insn()
2568 if ((insn & (1 << 4)) == 0) { in disas_cp15_insn()
2572 if (IS_USER(s) && !cp15_user_ok(insn)) { in disas_cp15_insn()
2579 if ((insn & 0x0fff0fff) == 0x0e070f90) { in disas_cp15_insn()
2591 if ((insn & 0x0fff0fff) == 0x0e070f58) { in disas_cp15_insn()
2607 rd = (insn >> 12) & 0xf; in disas_cp15_insn()
2609 if (cp15_tls_load_store(env, s, insn, rd)) in disas_cp15_insn()
2612 tmp2 = tcg_const_i32(insn); in disas_cp15_insn()
2613 if (insn & ARM_CP_RW_BIT) { in disas_cp15_insn()
2629 (insn & 0x0fff0fff) != 0x0e010f10) in disas_cp15_insn()
2637 #define VFP_SREG(insn, bigbit, smallbit) \ argument
2638 ((VFP_REG_SHR(insn, bigbit - 1) & 0x1e) | (((insn) >> (smallbit)) & 1))
2639 #define VFP_DREG(reg, insn, bigbit, smallbit) do { \ argument
2641 reg = (((insn) >> (bigbit)) & 0x0f) \
2642 | (((insn) >> ((smallbit) - 4)) & 0x10); \
2644 if (insn & (1 << (smallbit))) \
2646 reg = ((insn) >> (bigbit)) & 0x0f; \
2649 #define VFP_SREG_D(insn) VFP_SREG(insn, 12, 22) argument
2650 #define VFP_DREG_D(reg, insn) VFP_DREG(reg, insn, 12, 22) argument
2651 #define VFP_SREG_N(insn) VFP_SREG(insn, 16, 7) argument
2652 #define VFP_DREG_N(reg, insn) VFP_DREG(reg, insn, 16, 7) argument
2653 #define VFP_SREG_M(insn) VFP_SREG(insn, 0, 5) argument
2654 #define VFP_DREG_M(reg, insn) VFP_DREG(reg, insn, 0, 5) argument
2725 static int disas_vfp_insn(CPUState * env, DisasContext *s, uint32_t insn) in disas_vfp_insn() argument
2738 if ((insn & 0x0fe00fff) != 0x0ee00a10) in disas_vfp_insn()
2740 rn = (insn >> 16) & 0xf; in disas_vfp_insn()
2745 dp = ((insn & 0xf00) == 0xb00); in disas_vfp_insn()
2746 switch ((insn >> 24) & 0xf) { in disas_vfp_insn()
2748 if (insn & (1 << 4)) { in disas_vfp_insn()
2750 rd = (insn >> 12) & 0xf; in disas_vfp_insn()
2755 VFP_DREG_N(rn, insn); in disas_vfp_insn()
2756 if (insn & 0xf) in disas_vfp_insn()
2758 if (insn & 0x00c00060 in disas_vfp_insn()
2762 pass = (insn >> 21) & 1; in disas_vfp_insn()
2763 if (insn & (1 << 22)) { in disas_vfp_insn()
2765 offset = ((insn >> 5) & 3) * 8; in disas_vfp_insn()
2766 } else if (insn & (1 << 5)) { in disas_vfp_insn()
2768 offset = (insn & (1 << 6)) ? 16 : 0; in disas_vfp_insn()
2773 if (insn & ARM_CP_RW_BIT) { in disas_vfp_insn()
2780 if (insn & (1 << 23)) in disas_vfp_insn()
2786 if (insn & (1 << 23)) { in disas_vfp_insn()
2807 if (insn & (1 << 23)) { in disas_vfp_insn()
2840 if ((insn & 0x6f) != 0x00) in disas_vfp_insn()
2842 rn = VFP_SREG_N(insn); in disas_vfp_insn()
2843 if (insn & ARM_CP_RW_BIT) { in disas_vfp_insn()
2845 if (insn & (1 << 21)) { in disas_vfp_insn()
2905 if (insn & (1 << 21)) { in disas_vfp_insn()
2944 op = ((insn >> 20) & 8) | ((insn >> 19) & 6) | ((insn >> 6) & 1); in disas_vfp_insn()
2948 rn = ((insn >> 15) & 0x1e) | ((insn >> 7) & 1); in disas_vfp_insn()
2951 VFP_DREG_N(rn, insn); in disas_vfp_insn()
2956 rd = VFP_SREG_D(insn); in disas_vfp_insn()
2958 VFP_DREG_D(rd, insn); in disas_vfp_insn()
2965 rm = VFP_SREG_M(insn); in disas_vfp_insn()
2967 VFP_DREG_M(rm, insn); in disas_vfp_insn()
2970 rn = VFP_SREG_N(insn); in disas_vfp_insn()
2973 VFP_DREG_D(rd, insn); in disas_vfp_insn()
2975 rd = VFP_SREG_D(insn); in disas_vfp_insn()
2980 rm = VFP_SREG_M(insn); in disas_vfp_insn()
3112 n = (insn << 12) & 0x80000000; in disas_vfp_insn()
3113 i = ((insn >> 12) & 0x70) | (insn & 0xf); in disas_vfp_insn()
3323 if ((insn & 0x03e00000) == 0x00400000) { in disas_vfp_insn()
3325 rn = (insn >> 16) & 0xf; in disas_vfp_insn()
3326 rd = (insn >> 12) & 0xf; in disas_vfp_insn()
3328 VFP_DREG_M(rm, insn); in disas_vfp_insn()
3330 rm = VFP_SREG_M(insn); in disas_vfp_insn()
3333 if (insn & ARM_CP_RW_BIT) { in disas_vfp_insn()
3370 rn = (insn >> 16) & 0xf; in disas_vfp_insn()
3372 VFP_DREG_D(rd, insn); in disas_vfp_insn()
3374 rd = VFP_SREG_D(insn); in disas_vfp_insn()
3381 if ((insn & 0x01200000) == 0x01000000) { in disas_vfp_insn()
3383 offset = (insn & 0xff) << 2; in disas_vfp_insn()
3384 if ((insn & (1 << 23)) == 0) in disas_vfp_insn()
3387 if (insn & (1 << 20)) { in disas_vfp_insn()
3398 n = (insn >> 1) & 0x7f; in disas_vfp_insn()
3400 n = insn & 0xff; in disas_vfp_insn()
3402 if (insn & (1 << 24)) /* pre-decrement */ in disas_vfp_insn()
3403 tcg_gen_addi_i32(addr, addr, -((insn & 0xff) << 2)); in disas_vfp_insn()
3411 if (insn & ARM_CP_RW_BIT) { in disas_vfp_insn()
3423 if (insn & (1 << 21)) { in disas_vfp_insn()
3425 if (insn & (1 << 24)) in disas_vfp_insn()
3427 else if (dp && (insn & 1)) in disas_vfp_insn()
3827 static int disas_neon_ls_insn(CPUState * env, DisasContext *s, uint32_t insn) in disas_neon_ls_insn() argument
3846 VFP_DREG_D(rd, insn); in disas_neon_ls_insn()
3847 rn = (insn >> 16) & 0xf; in disas_neon_ls_insn()
3848 rm = insn & 0xf; in disas_neon_ls_insn()
3849 load = (insn & (1 << 21)) != 0; in disas_neon_ls_insn()
3850 if ((insn & (1 << 23)) == 0) { in disas_neon_ls_insn()
3852 op = (insn >> 8) & 0xf; in disas_neon_ls_insn()
3853 size = (insn >> 6) & 3; in disas_neon_ls_insn()
3859 if (((insn >> 5) & 1) == 1) { in disas_neon_ls_insn()
3864 if (((insn >> 4) & 3) == 3) { in disas_neon_ls_insn()
3877 addr = tcg_const_i32(insn); in disas_neon_ls_insn()
3882 size = (insn >> 10) & 3; in disas_neon_ls_insn()
3885 int a = (insn >> 4) & 1; in disas_neon_ls_insn()
3889 size = (insn >> 6) & 3; in disas_neon_ls_insn()
3890 nregs = ((insn >> 8) & 3) + 1; in disas_neon_ls_insn()
3912 if (insn & (1 << 5)) { in disas_neon_ls_insn()
3919 stride = (insn & (1 << 5)) ? 2 : 1; in disas_neon_ls_insn()
3933 int idx = (insn >> 4) & 0xf; in disas_neon_ls_insn()
3934 pass = (insn >> 7) & 1; in disas_neon_ls_insn()
3937 shift = ((insn >> 5) & 3) * 8; in disas_neon_ls_insn()
3941 shift = ((insn >> 6) & 1) * 16; in disas_neon_ls_insn()
3942 stride = (insn & (1 << 5)) ? 2 : 1; in disas_neon_ls_insn()
3946 stride = (insn & (1 << 6)) ? 2 : 1; in disas_neon_ls_insn()
3951 nregs = ((insn >> 8) & 3) + 1; in disas_neon_ls_insn()
4416 static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn) in disas_neon_data_insn() argument
4433 q = (insn & (1 << 6)) != 0; in disas_neon_data_insn()
4434 u = (insn >> 24) & 1; in disas_neon_data_insn()
4435 VFP_DREG_D(rd, insn); in disas_neon_data_insn()
4436 VFP_DREG_N(rn, insn); in disas_neon_data_insn()
4437 VFP_DREG_M(rm, insn); in disas_neon_data_insn()
4438 size = (insn >> 20) & 3; in disas_neon_data_insn()
4439 if ((insn & (1 << 23)) == 0) { in disas_neon_data_insn()
4441 op = ((insn >> 7) & 0x1e) | ((insn >> 4) & 1); in disas_neon_data_insn()
4838 } else if (insn & (1 << 4)) { in disas_neon_data_insn()
4839 if ((insn & 0x00380080) != 0) { in disas_neon_data_insn()
4841 op = (insn >> 8) & 0xf; in disas_neon_data_insn()
4842 if (insn & (1 << 7)) { in disas_neon_data_insn()
4850 while ((insn & (1 << (size + 19))) == 0) in disas_neon_data_insn()
4853 shift = (insn >> 16) & ((1 << (3 + size)) - 1); in disas_neon_data_insn()
5155 if (!(insn & (1 << 21)) || (q && ((rd | rm) & 1))) { in disas_neon_data_insn()
5186 op = (insn >> 8) & 0xf; in disas_neon_data_insn()
5188 imm = (u << 7) | ((insn >> 12) & 0x70) | (insn & 0xf); in disas_neon_data_insn()
5189 invert = (insn & (1 << 5)) != 0; in disas_neon_data_insn()
5266 op = (insn >> 8) & 0xf; in disas_neon_data_insn()
5267 if ((insn & (1 << 6)) == 0) { in disas_neon_data_insn()
5607 imm = (insn >> 8) & 0xf; in disas_neon_data_insn()
5660 } else if ((insn & (1 << 11)) == 0) { in disas_neon_data_insn()
5662 op = ((insn >> 12) & 0x30) | ((insn >> 7) & 0xf); in disas_neon_data_insn()
5663 size = (insn >> 18) & 3; in disas_neon_data_insn()
6012 } else if ((insn & (1 << 10)) == 0) { in disas_neon_data_insn()
6014 int n = ((insn >> 8) & 3) + 1; in disas_neon_data_insn()
6022 if (insn & (1 << 6)) { in disas_neon_data_insn()
6033 if (insn & (1 << 6)) { in disas_neon_data_insn()
6046 } else if ((insn & 0x380) == 0) { in disas_neon_data_insn()
6048 if ((insn & (7 << 16)) == 0 || (q && (rd & 1))) { in disas_neon_data_insn()
6051 if (insn & (1 << 19)) { in disas_neon_data_insn()
6056 if (insn & (1 << 16)) { in disas_neon_data_insn()
6057 gen_neon_dup_u8(tmp, ((insn >> 17) & 3) * 8); in disas_neon_data_insn()
6058 } else if (insn & (1 << 17)) { in disas_neon_data_insn()
6059 if ((insn >> 18) & 1) in disas_neon_data_insn()
6078 static int disas_cp14_read(CPUState * env, DisasContext *s, uint32_t insn) in disas_cp14_read() argument
6080 int crn = (insn >> 16) & 0xf; in disas_cp14_read()
6081 int crm = insn & 0xf; in disas_cp14_read()
6082 int op1 = (insn >> 21) & 7; in disas_cp14_read()
6083 int op2 = (insn >> 5) & 7; in disas_cp14_read()
6084 int rt = (insn >> 12) & 0xf; in disas_cp14_read()
6138 static int disas_cp14_write(CPUState * env, DisasContext *s, uint32_t insn) in disas_cp14_write() argument
6140 int crn = (insn >> 16) & 0xf; in disas_cp14_write()
6141 int crm = insn & 0xf; in disas_cp14_write()
6142 int op1 = (insn >> 21) & 7; in disas_cp14_write()
6143 int op2 = (insn >> 5) & 7; in disas_cp14_write()
6144 int rt = (insn >> 12) & 0xf; in disas_cp14_write()
6195 static int disas_coproc_insn(CPUState * env, DisasContext *s, uint32_t insn) in disas_coproc_insn() argument
6199 cpnum = (insn >> 8) & 0xf; in disas_coproc_insn()
6208 return disas_iwmmxt_insn(env, s, insn); in disas_coproc_insn()
6210 return disas_dsp_insn(env, s, insn); in disas_coproc_insn()
6215 return disas_vfp_insn (env, s, insn); in disas_coproc_insn()
6221 if (insn & (1 << 20)) in disas_coproc_insn()
6222 return disas_cp14_read(env, s, insn); in disas_coproc_insn()
6224 return disas_cp14_write(env, s, insn); in disas_coproc_insn()
6226 return disas_cp15_insn (env, s, insn); in disas_coproc_insn()
6230 return disas_cp_insn (env, s, insn); in disas_coproc_insn()
6417 unsigned int cond, insn, val, op1, i, shift, rm, rs, rn, rd, sh; in disas_arm_insn() local
6425 insn = ldl_code(s->pc); in disas_arm_insn()
6436 cond = insn >> 28; in disas_arm_insn()
6446 if (((insn >> 25) & 7) == 1) { in disas_arm_insn()
6451 if (disas_neon_data_insn(env, s, insn)) in disas_arm_insn()
6455 if ((insn & 0x0f100000) == 0x04000000) { in disas_arm_insn()
6460 if (disas_neon_ls_insn(env, s, insn)) in disas_arm_insn()
6464 if (((insn & 0x0f30f000) == 0x0510f000) || in disas_arm_insn()
6465 ((insn & 0x0f30f010) == 0x0710f000)) { in disas_arm_insn()
6466 if ((insn & (1 << 22)) == 0) { in disas_arm_insn()
6476 if (((insn & 0x0f70f000) == 0x0450f000) || in disas_arm_insn()
6477 ((insn & 0x0f70f010) == 0x0650f000)) { in disas_arm_insn()
6481 if (((insn & 0x0f700000) == 0x04100000) || in disas_arm_insn()
6482 ((insn & 0x0f700010) == 0x06100000)) { in disas_arm_insn()
6489 if ((insn & 0x0ffffdff) == 0x01010000) { in disas_arm_insn()
6492 if (insn & (1 << 9)) { in disas_arm_insn()
6497 } else if ((insn & 0x0fffff00) == 0x057ff000) { in disas_arm_insn()
6498 switch ((insn >> 4) & 0xf) { in disas_arm_insn()
6512 } else if ((insn & 0x0e5fffe0) == 0x084d0500) { in disas_arm_insn()
6518 op1 = (insn & 0x1f); in disas_arm_insn()
6523 i = (insn >> 23) & 3; in disas_arm_insn()
6538 if (insn & (1 << 21)) { in disas_arm_insn()
6557 } else if ((insn & 0x0e50ffe0) == 0x08100a00) { in disas_arm_insn()
6563 rn = (insn >> 16) & 0xf; in disas_arm_insn()
6565 i = (insn >> 23) & 3; in disas_arm_insn()
6579 if (insn & (1 << 21)) { in disas_arm_insn()
6596 } else if ((insn & 0x0e000000) == 0x0a000000) { in disas_arm_insn()
6605 offset = (((int32_t)insn) << 8) >> 8; in disas_arm_insn()
6607 val += (offset << 2) | ((insn >> 23) & 2) | 1; in disas_arm_insn()
6613 } else if ((insn & 0x0e000f00) == 0x0c000100) { in disas_arm_insn()
6617 if (!disas_iwmmxt_insn(env, s, insn)) in disas_arm_insn()
6620 } else if ((insn & 0x0fe00000) == 0x0c400000) { in disas_arm_insn()
6623 } else if ((insn & 0x0f000010) == 0x0e000010) { in disas_arm_insn()
6625 if (!disas_coproc_insn(env, s, insn)) { in disas_arm_insn()
6628 } else if ((insn & 0x0ff10020) == 0x01000000) { in disas_arm_insn()
6635 if (insn & (1 << 19)) { in disas_arm_insn()
6636 if (insn & (1 << 8)) in disas_arm_insn()
6638 if (insn & (1 << 7)) in disas_arm_insn()
6640 if (insn & (1 << 6)) in disas_arm_insn()
6642 if (insn & (1 << 18)) in disas_arm_insn()
6645 if (insn & (1 << 17)) { in disas_arm_insn()
6647 val |= (insn & 0x1f); in disas_arm_insn()
6665 if ((insn & 0x0f900000) == 0x03000000) { in disas_arm_insn()
6666 if ((insn & (1 << 21)) == 0) { in disas_arm_insn()
6668 rd = (insn >> 12) & 0xf; in disas_arm_insn()
6669 val = ((insn >> 4) & 0xf000) | (insn & 0xfff); in disas_arm_insn()
6670 if ((insn & (1 << 22)) == 0) { in disas_arm_insn()
6682 if (((insn >> 12) & 0xf) != 0xf) in disas_arm_insn()
6684 if (((insn >> 16) & 0xf) == 0) { in disas_arm_insn()
6685 gen_nop_hint(s, insn & 0xff); in disas_arm_insn()
6688 val = insn & 0xff; in disas_arm_insn()
6689 shift = ((insn >> 8) & 0xf) * 2; in disas_arm_insn()
6692 i = ((insn & (1 << 22)) != 0); in disas_arm_insn()
6693 if (gen_set_psr_im(s, msr_mask(env, s, (insn >> 16) & 0xf, i), i, val)) in disas_arm_insn()
6697 } else if ((insn & 0x0f900000) == 0x01000000 in disas_arm_insn()
6698 && (insn & 0x00000090) != 0x00000090) { in disas_arm_insn()
6700 op1 = (insn >> 21) & 3; in disas_arm_insn()
6701 sh = (insn >> 4) & 0xf; in disas_arm_insn()
6702 rm = insn & 0xf; in disas_arm_insn()
6709 if (gen_set_psr(s, msr_mask(env, s, (insn >> 16) & 0xf, i), i, tmp)) in disas_arm_insn()
6713 rd = (insn >> 12) & 0xf; in disas_arm_insn()
6734 rd = (insn >> 12) & 0xf; in disas_arm_insn()
6766 rd = (insn >> 12) & 0xf; in disas_arm_insn()
6767 rn = (insn >> 16) & 0xf; in disas_arm_insn()
6799 rs = (insn >> 8) & 0xf; in disas_arm_insn()
6800 rn = (insn >> 12) & 0xf; in disas_arm_insn()
6801 rd = (insn >> 16) & 0xf; in disas_arm_insn()
6847 } else if (((insn & 0x0e000000) == 0 && in disas_arm_insn()
6848 (insn & 0x00000090) != 0x90) || in disas_arm_insn()
6849 ((insn & 0x0e000000) == (1 << 25))) { in disas_arm_insn()
6852 op1 = (insn >> 21) & 0xf; in disas_arm_insn()
6853 set_cc = (insn >> 20) & 1; in disas_arm_insn()
6857 if (insn & (1 << 25)) { in disas_arm_insn()
6859 val = insn & 0xff; in disas_arm_insn()
6860 shift = ((insn >> 8) & 0xf) * 2; in disas_arm_insn()
6871 rm = (insn) & 0xf; in disas_arm_insn()
6873 shiftop = (insn >> 5) & 3; in disas_arm_insn()
6874 if (!(insn & (1 << 4))) { in disas_arm_insn()
6875 shift = (insn >> 7) & 0x1f; in disas_arm_insn()
6878 rs = (insn >> 8) & 0xf; in disas_arm_insn()
6884 rn = (insn >> 16) & 0xf; in disas_arm_insn()
6889 rd = (insn >> 12) & 0xf; in disas_arm_insn()
7030 op1 = (insn >> 24) & 0xf; in disas_arm_insn()
7035 sh = (insn >> 5) & 3; in disas_arm_insn()
7038 rd = (insn >> 16) & 0xf; in disas_arm_insn()
7039 rn = (insn >> 12) & 0xf; in disas_arm_insn()
7040 rs = (insn >> 8) & 0xf; in disas_arm_insn()
7041 rm = (insn) & 0xf; in disas_arm_insn()
7042 op1 = (insn >> 20) & 0xf; in disas_arm_insn()
7050 if (insn & (1 << 22)) { in disas_arm_insn()
7056 } else if (insn & (1 << 21)) { in disas_arm_insn()
7062 if (insn & (1 << 20)) in disas_arm_insn()
7082 if (insn & (1 << 22)) { in disas_arm_insn()
7087 if (insn & (1 << 21)) { /* mult accumulate */ in disas_arm_insn()
7090 if (insn & (1 << 20)) { in disas_arm_insn()
7100 rn = (insn >> 16) & 0xf; in disas_arm_insn()
7101 rd = (insn >> 12) & 0xf; in disas_arm_insn()
7102 if (insn & (1 << 23)) { in disas_arm_insn()
7104 op1 = (insn >> 21) & 0x3; in disas_arm_insn()
7111 if (insn & (1 << 20)) { in disas_arm_insn()
7129 rm = insn & 0xf; in disas_arm_insn()
7150 rm = (insn) & 0xf; in disas_arm_insn()
7157 if (insn & (1 << 22)) { in disas_arm_insn()
7172 rn = (insn >> 16) & 0xf; in disas_arm_insn()
7173 rd = (insn >> 12) & 0xf; in disas_arm_insn()
7175 if (insn & (1 << 24)) in disas_arm_insn()
7176 gen_add_datah_offset(s, insn, 0, addr); in disas_arm_insn()
7178 if (insn & (1 << 20)) { in disas_arm_insn()
7224 if (!(insn & (1 << 24))) { in disas_arm_insn()
7225 gen_add_datah_offset(s, insn, address_offset, addr); in disas_arm_insn()
7227 } else if (insn & (1 << 21)) { in disas_arm_insn()
7245 if (insn & (1 << 4)) { in disas_arm_insn()
7248 rm = insn & 0xf; in disas_arm_insn()
7249 rn = (insn >> 16) & 0xf; in disas_arm_insn()
7250 rd = (insn >> 12) & 0xf; in disas_arm_insn()
7251 rs = (insn >> 8) & 0xf; in disas_arm_insn()
7252 switch ((insn >> 23) & 3) { in disas_arm_insn()
7254 op1 = (insn >> 20) & 7; in disas_arm_insn()
7257 sh = (insn >> 5) & 7; in disas_arm_insn()
7265 if ((insn & 0x00700020) == 0) { in disas_arm_insn()
7269 shift = (insn >> 7) & 0x1f; in disas_arm_insn()
7270 if (insn & (1 << 6)) { in disas_arm_insn()
7287 } else if ((insn & 0x00200020) == 0x00200000) { in disas_arm_insn()
7290 shift = (insn >> 7) & 0x1f; in disas_arm_insn()
7291 if (insn & (1 << 6)) { in disas_arm_insn()
7298 sh = (insn >> 16) & 0x1f; in disas_arm_insn()
7300 if (insn & (1 << 22)) in disas_arm_insn()
7306 } else if ((insn & 0x00300fe0) == 0x00200f20) { in disas_arm_insn()
7309 sh = (insn >> 16) & 0x1f; in disas_arm_insn()
7311 if (insn & (1 << 22)) in disas_arm_insn()
7317 } else if ((insn & 0x00700fe0) == 0x00000fa0) { in disas_arm_insn()
7327 } else if ((insn & 0x000003e0) == 0x00000060) { in disas_arm_insn()
7329 shift = (insn >> 10) & 3; in disas_arm_insn()
7334 op1 = (insn >> 20) & 7; in disas_arm_insn()
7354 } else if ((insn & 0x003f0f60) == 0x003f0f20) { in disas_arm_insn()
7357 if (insn & (1 << 22)) { in disas_arm_insn()
7358 if (insn & (1 << 7)) { in disas_arm_insn()
7365 if (insn & (1 << 7)) in disas_arm_insn()
7378 if (insn & (1 << 20)) { in disas_arm_insn()
7385 if (insn & (1 << 6)) { in disas_arm_insn()
7391 if (insn & (1 << 5)) { in disas_arm_insn()
7400 if (insn & (1 << 5)) in disas_arm_insn()
7403 if (insn & (1 << 6)) { in disas_arm_insn()
7414 if (insn & (1 << 22)) { in disas_arm_insn()
7435 op1 = ((insn >> 17) & 0x38) | ((insn >> 5) & 7); in disas_arm_insn()
7453 shift = (insn >> 7) & 0x1f; in disas_arm_insn()
7454 i = (insn >> 16) & 0x1f; in disas_arm_insn()
7473 shift = (insn >> 7) & 0x1f; in disas_arm_insn()
7474 i = ((insn >> 16) & 0x1f) + 1; in disas_arm_insn()
7499 if (op1 == 0x7 && ((insn & sh) == sh)) in disas_arm_insn()
7504 rn = (insn >> 16) & 0xf; in disas_arm_insn()
7505 rd = (insn >> 12) & 0xf; in disas_arm_insn()
7507 i = (IS_USER(s) || (insn & 0x01200000) == 0x00200000); in disas_arm_insn()
7508 if (insn & (1 << 24)) in disas_arm_insn()
7509 gen_add_data_offset(s, insn, tmp2); in disas_arm_insn()
7510 if (insn & (1 << 20)) { in disas_arm_insn()
7512 if (insn & (1 << 22)) { in disas_arm_insn()
7520 if (insn & (1 << 22)) in disas_arm_insn()
7525 if (!(insn & (1 << 24))) { in disas_arm_insn()
7526 gen_add_data_offset(s, insn, tmp2); in disas_arm_insn()
7528 } else if (insn & (1 << 21)) { in disas_arm_insn()
7533 if (insn & (1 << 20)) { in disas_arm_insn()
7546 if (insn & (1 << 22)) { in disas_arm_insn()
7550 if ((insn & (1 << 15)) == 0) in disas_arm_insn()
7553 rn = (insn >> 16) & 0xf; in disas_arm_insn()
7562 if (insn & (1 << i)) in disas_arm_insn()
7566 if (insn & (1 << 23)) { in disas_arm_insn()
7567 if (insn & (1 << 24)) { in disas_arm_insn()
7574 if (insn & (1 << 24)) { in disas_arm_insn()
7585 if (insn & (1 << i)) { in disas_arm_insn()
7586 if (insn & (1 << 20)) { in disas_arm_insn()
7623 if (insn & (1 << 21)) { in disas_arm_insn()
7625 if (insn & (1 << 23)) { in disas_arm_insn()
7626 if (insn & (1 << 24)) { in disas_arm_insn()
7633 if (insn & (1 << 24)) { in disas_arm_insn()
7650 if ((insn & (1 << 22)) && !user) { in disas_arm_insn()
7666 if (insn & (1 << 24)) { in disas_arm_insn()
7671 offset = (((int32_t)insn << 8) >> 8); in disas_arm_insn()
7680 if (disas_coproc_insn(env, s, insn)) in disas_arm_insn()
7781 uint32_t insn, imm, shift, offset; in disas_thumb2_insn() local
7797 insn = insn_hw1; in disas_thumb2_insn()
7798 if ((insn & (1 << 12)) == 0) { in disas_thumb2_insn()
7801 offset = ((insn & 0x7ff) << 1); in disas_thumb2_insn()
7812 if (insn & (1 << 11)) { in disas_thumb2_insn()
7814 offset = ((insn & 0x7ff) << 1) | 1; in disas_thumb2_insn()
7828 offset = ((int32_t)insn << 21) >> 9; in disas_thumb2_insn()
7835 insn = lduw_code(s->pc); in disas_thumb2_insn()
7838 insn |= (uint32_t)insn_hw1 << 16; in disas_thumb2_insn()
7840 if ((insn & 0xf800e800) != 0xf000e800) { in disas_thumb2_insn()
7844 rn = (insn >> 16) & 0xf; in disas_thumb2_insn()
7845 rs = (insn >> 12) & 0xf; in disas_thumb2_insn()
7846 rd = (insn >> 8) & 0xf; in disas_thumb2_insn()
7847 rm = insn & 0xf; in disas_thumb2_insn()
7848 switch ((insn >> 25) & 0xf) { in disas_thumb2_insn()
7853 if (insn & (1 << 22)) { in disas_thumb2_insn()
7855 if (insn & 0x01200000) { in disas_thumb2_insn()
7863 offset = (insn & 0xff) * 4; in disas_thumb2_insn()
7864 if ((insn & (1 << 23)) == 0) in disas_thumb2_insn()
7866 if (insn & (1 << 24)) { in disas_thumb2_insn()
7870 if (insn & (1 << 20)) { in disas_thumb2_insn()
7885 if (insn & (1 << 21)) { in disas_thumb2_insn()
7894 } else if ((insn & (1 << 23)) == 0) { in disas_thumb2_insn()
7898 tcg_gen_addi_i32(addr, addr, (insn & 0xff) << 2); in disas_thumb2_insn()
7899 if (insn & (1 << 20)) { in disas_thumb2_insn()
7905 } else if ((insn & (1 << 6)) == 0) { in disas_thumb2_insn()
7915 if (insn & (1 << 4)) { in disas_thumb2_insn()
7931 op = (insn >> 4) & 0x3; in disas_thumb2_insn()
7937 if (insn & (1 << 20)) { in disas_thumb2_insn()
7946 if (((insn >> 23) & 1) == ((insn >> 24) & 1)) { in disas_thumb2_insn()
7950 if (insn & (1 << 20)) { in disas_thumb2_insn()
7953 if ((insn & (1 << 24)) == 0) in disas_thumb2_insn()
7959 if (insn & (1 << 21)) { in disas_thumb2_insn()
7961 if (insn & (1 << 24)) { in disas_thumb2_insn()
7973 op = (insn & 0x1f); in disas_thumb2_insn()
7978 if ((insn & (1 << 24)) == 0) { in disas_thumb2_insn()
7987 if (insn & (1 << 21)) { in disas_thumb2_insn()
7988 if ((insn & (1 << 24)) == 0) { in disas_thumb2_insn()
8007 if (insn & (1 << i)) in disas_thumb2_insn()
8010 if (insn & (1 << 24)) { in disas_thumb2_insn()
8017 if ((insn & (1 << i)) == 0) in disas_thumb2_insn()
8019 if (insn & (1 << 20)) { in disas_thumb2_insn()
8041 if (insn & (1 << 21)) { in disas_thumb2_insn()
8043 if (insn & (1 << 24)) { in disas_thumb2_insn()
8047 if (insn & (1 << rn)) in disas_thumb2_insn()
8058 op = (insn >> 21) & 0xf; in disas_thumb2_insn()
8063 shift = ((insn >> 10) & 0x1c) | ((insn >> 6) & 0x3); in disas_thumb2_insn()
8064 if (insn & (1 << 5)) { in disas_thumb2_insn()
8091 shiftop = (insn >> 4) & 3; in disas_thumb2_insn()
8092 shift = ((insn >> 6) & 3) | ((insn >> 10) & 0x1c); in disas_thumb2_insn()
8093 conds = (insn & (1 << 20)) != 0; in disas_thumb2_insn()
8107 op = ((insn >> 22) & 6) | ((insn >> 7) & 1); in disas_thumb2_insn()
8108 if (op < 4 && (insn & 0xf000) != 0xf000) in disas_thumb2_insn()
8114 if ((insn & 0x70) != 0) in disas_thumb2_insn()
8116 op = (insn >> 21) & 3; in disas_thumb2_insn()
8117 logic_cc = (insn & (1 << 20)) != 0; in disas_thumb2_insn()
8125 shift = (insn >> 4) & 3; in disas_thumb2_insn()
8130 op = (insn >> 20) & 7; in disas_thumb2_insn()
8152 op = (insn >> 20) & 7; in disas_thumb2_insn()
8153 shift = (insn >> 4) & 7; in disas_thumb2_insn()
8163 op = ((insn >> 17) & 0x38) | ((insn >> 4) & 7); in disas_thumb2_insn()
8208 op = (insn >> 4) & 0xf; in disas_thumb2_insn()
8211 switch ((insn >> 20) & 7) { in disas_thumb2_insn()
8238 if (insn & (1 << 22)) { in disas_thumb2_insn()
8277 if (insn & (1 << 20)) { in disas_thumb2_insn()
8283 if (insn & (1 << 4)) { in disas_thumb2_insn()
8304 op = ((insn >> 4) & 0xf) | ((insn >> 16) & 0x70); in disas_thumb2_insn()
8368 if (((insn >> 24) & 3) == 3) { in disas_thumb2_insn()
8370 insn = (insn & 0xe2ffffff) | ((insn & (1 << 28)) >> 4) | (1 << 28); in disas_thumb2_insn()
8371 if (disas_neon_data_insn(env, s, insn)) in disas_thumb2_insn()
8374 if (insn & (1 << 28)) in disas_thumb2_insn()
8376 if (disas_coproc_insn (env, s, insn)) in disas_thumb2_insn()
8381 if (insn & (1 << 15)) { in disas_thumb2_insn()
8383 if (insn & 0x5000) { in disas_thumb2_insn()
8386 offset = ((int32_t)insn << 5) >> 9 & ~(int32_t)0xfff; in disas_thumb2_insn()
8388 offset |= (insn & 0x7ff) << 1; in disas_thumb2_insn()
8392 offset ^= ((~insn) & (1 << 13)) << 10; in disas_thumb2_insn()
8393 offset ^= ((~insn) & (1 << 11)) << 11; in disas_thumb2_insn()
8395 if (insn & (1 << 14)) { in disas_thumb2_insn()
8401 if (insn & (1 << 12)) { in disas_thumb2_insn()
8410 } else if (((insn >> 23) & 7) == 7) { in disas_thumb2_insn()
8412 if (insn & (1 << 13)) in disas_thumb2_insn()
8415 if (insn & (1 << 26)) { in disas_thumb2_insn()
8422 op = (insn >> 20) & 7; in disas_thumb2_insn()
8427 addr = tcg_const_i32(insn & 0xff); in disas_thumb2_insn()
8440 msr_mask(env, s, (insn >> 8) & 0xf, op == 1), in disas_thumb2_insn()
8445 if (((insn >> 8) & 7) == 0) { in disas_thumb2_insn()
8446 gen_nop_hint(s, insn & 0xff); in disas_thumb2_insn()
8453 if (insn & (1 << 10)) { in disas_thumb2_insn()
8454 if (insn & (1 << 7)) in disas_thumb2_insn()
8456 if (insn & (1 << 6)) in disas_thumb2_insn()
8458 if (insn & (1 << 5)) in disas_thumb2_insn()
8460 if (insn & (1 << 9)) in disas_thumb2_insn()
8463 if (insn & (1 << 8)) { in disas_thumb2_insn()
8465 imm |= (insn & 0x1f); in disas_thumb2_insn()
8473 op = (insn >> 4) & 0xf; in disas_thumb2_insn()
8500 tcg_gen_subi_i32(tmp, tmp, insn & 0xff); in disas_thumb2_insn()
8506 addr = tcg_const_i32(insn & 0xff); in disas_thumb2_insn()
8525 op = (insn >> 22) & 0xf; in disas_thumb2_insn()
8532 offset = (insn & 0x7ff) << 1; in disas_thumb2_insn()
8534 offset |= (insn & 0x003f0000) >> 4; in disas_thumb2_insn()
8536 offset |= ((int32_t)((insn << 5) & 0x80000000)) >> 11; in disas_thumb2_insn()
8538 offset |= (insn & (1 << 13)) << 5; in disas_thumb2_insn()
8540 offset |= (insn & (1 << 11)) << 8; in disas_thumb2_insn()
8547 if (insn & (1 << 25)) { in disas_thumb2_insn()
8548 if (insn & (1 << 24)) { in disas_thumb2_insn()
8549 if (insn & (1 << 20)) in disas_thumb2_insn()
8552 op = (insn >> 21) & 7; in disas_thumb2_insn()
8553 imm = insn & 0x1f; in disas_thumb2_insn()
8554 shift = ((insn >> 6) & 3) | ((insn >> 10) & 0x1c); in disas_thumb2_insn()
8614 imm = ((insn & 0x04000000) >> 15) in disas_thumb2_insn()
8615 | ((insn & 0x7000) >> 4) | (insn & 0xff); in disas_thumb2_insn()
8616 if (insn & (1 << 22)) { in disas_thumb2_insn()
8618 imm |= (insn >> 4) & 0xf000; in disas_thumb2_insn()
8619 if (insn & (1 << 23)) { in disas_thumb2_insn()
8633 if (insn & (1 << 23)) in disas_thumb2_insn()
8641 if (insn & (1 << 23)) in disas_thumb2_insn()
8652 shift = ((insn & 0x04000000) >> 23) | ((insn & 0x7000) >> 12); in disas_thumb2_insn()
8653 imm = (insn & 0xff); in disas_thumb2_insn()
8678 rn = (insn >> 16) & 0xf; in disas_thumb2_insn()
8685 op = (insn >> 21) & 0xf; in disas_thumb2_insn()
8686 if (gen_thumb2_data_op(s, op, (insn & (1 << 20)) != 0, in disas_thumb2_insn()
8690 rd = (insn >> 8) & 0xf; in disas_thumb2_insn()
8704 if ((insn & 0x01100000) == 0x01000000) { in disas_thumb2_insn()
8705 if (disas_neon_ls_insn(env, s, insn)) in disas_thumb2_insn()
8709 op = ((insn >> 21) & 3) | ((insn >> 22) & 4); in disas_thumb2_insn()
8711 if (!(insn & (1 << 20))) { in disas_thumb2_insn()
8726 int op1 = (insn >> 23) & 3; in disas_thumb2_insn()
8727 int op2 = (insn >> 6) & 0x3f; in disas_thumb2_insn()
8751 if (insn & (1 << 23)) in disas_thumb2_insn()
8752 imm += insn & 0xfff; in disas_thumb2_insn()
8754 imm -= insn & 0xfff; in disas_thumb2_insn()
8758 if (insn & (1 << 23)) { in disas_thumb2_insn()
8760 imm = insn & 0xfff; in disas_thumb2_insn()
8763 imm = insn & 0xff; in disas_thumb2_insn()
8764 switch ((insn >> 8) & 0xf) { in disas_thumb2_insn()
8766 shift = (insn >> 4) & 0xf; in disas_thumb2_insn()
8804 if (insn & (1 << 20)) { in disas_thumb2_insn()
8852 uint32_t val, insn, op, rm, rn, rd, shift, cond; in disas_thumb_insn() local
8868 insn = lduw_code(s->pc); in disas_thumb_insn()
8876 switch (insn >> 12) { in disas_thumb_insn()
8879 rd = insn & 7; in disas_thumb_insn()
8880 op = (insn >> 11) & 3; in disas_thumb_insn()
8883 rn = (insn >> 3) & 7; in disas_thumb_insn()
8885 if (insn & (1 << 10)) { in disas_thumb_insn()
8888 tcg_gen_movi_i32(tmp2, (insn >> 6) & 7); in disas_thumb_insn()
8891 rm = (insn >> 6) & 7; in disas_thumb_insn()
8894 if (insn & (1 << 9)) { in disas_thumb_insn()
8909 rm = (insn >> 3) & 7; in disas_thumb_insn()
8910 shift = (insn >> 6) & 0x1f; in disas_thumb_insn()
8920 op = (insn >> 11) & 3; in disas_thumb_insn()
8921 rd = (insn >> 8) & 0x7; in disas_thumb_insn()
8924 tcg_gen_movi_i32(tmp, insn & 0xff); in disas_thumb_insn()
8931 tcg_gen_movi_i32(tmp2, insn & 0xff); in disas_thumb_insn()
8958 if (insn & (1 << 11)) { in disas_thumb_insn()
8959 rd = (insn >> 8) & 7; in disas_thumb_insn()
8961 val = s->pc + 2 + ((insn & 0xff) * 4); in disas_thumb_insn()
8970 if (insn & (1 << 10)) { in disas_thumb_insn()
8972 rd = (insn & 7) | ((insn >> 4) & 8); in disas_thumb_insn()
8973 rm = (insn >> 3) & 0xf; in disas_thumb_insn()
8974 op = (insn >> 8) & 3; in disas_thumb_insn()
8996 if (insn & (1 << 7)) { in disas_thumb_insn()
9011 rd = insn & 7; in disas_thumb_insn()
9012 rm = (insn >> 3) & 7; in disas_thumb_insn()
9013 op = (insn >> 6) & 0xf; in disas_thumb_insn()
9149 rd = insn & 7; in disas_thumb_insn()
9150 rn = (insn >> 3) & 7; in disas_thumb_insn()
9151 rm = (insn >> 6) & 7; in disas_thumb_insn()
9152 op = (insn >> 9) & 7; in disas_thumb_insn()
9194 rd = insn & 7; in disas_thumb_insn()
9195 rn = (insn >> 3) & 7; in disas_thumb_insn()
9197 val = (insn >> 4) & 0x7c; in disas_thumb_insn()
9200 if (insn & (1 << 11)) { in disas_thumb_insn()
9214 rd = insn & 7; in disas_thumb_insn()
9215 rn = (insn >> 3) & 7; in disas_thumb_insn()
9217 val = (insn >> 6) & 0x1f; in disas_thumb_insn()
9220 if (insn & (1 << 11)) { in disas_thumb_insn()
9234 rd = insn & 7; in disas_thumb_insn()
9235 rn = (insn >> 3) & 7; in disas_thumb_insn()
9237 val = (insn >> 5) & 0x3e; in disas_thumb_insn()
9240 if (insn & (1 << 11)) { in disas_thumb_insn()
9254 rd = (insn >> 8) & 7; in disas_thumb_insn()
9256 val = (insn & 0xff) * 4; in disas_thumb_insn()
9259 if (insn & (1 << 11)) { in disas_thumb_insn()
9273 rd = (insn >> 8) & 7; in disas_thumb_insn()
9274 if (insn & (1 << 11)) { in disas_thumb_insn()
9282 val = (insn & 0xff) * 4; in disas_thumb_insn()
9289 op = (insn >> 8) & 0xf; in disas_thumb_insn()
9294 val = (insn & 0x7f) * 4; in disas_thumb_insn()
9295 if (insn & (1 << 7)) in disas_thumb_insn()
9303 rd = insn & 7; in disas_thumb_insn()
9304 rm = (insn >> 3) & 7; in disas_thumb_insn()
9306 switch ((insn >> 6) & 3) { in disas_thumb_insn()
9317 if (insn & (1 << 8)) in disas_thumb_insn()
9322 if (insn & (1 << i)) in disas_thumb_insn()
9325 if ((insn & (1 << 11)) == 0) { in disas_thumb_insn()
9330 if (insn & (1 << i)) { in disas_thumb_insn()
9331 if (insn & (1 << 11)) { in disas_thumb_insn()
9345 if (insn & (1 << 8)) { in disas_thumb_insn()
9346 if (insn & (1 << 11)) { in disas_thumb_insn()
9359 if ((insn & (1 << 11)) == 0) { in disas_thumb_insn()
9365 if ((insn & 0x0900) == 0x0900) { in disas_thumb_insn()
9371 rm = insn & 7; in disas_thumb_insn()
9375 if (insn & (1 << 11)) in disas_thumb_insn()
9380 offset = ((insn & 0xf8) >> 2) | (insn & 0x200) >> 3; in disas_thumb_insn()
9387 if ((insn & 0xf) == 0) { in disas_thumb_insn()
9388 gen_nop_hint(s, (insn >> 4) & 0xf); in disas_thumb_insn()
9392 s->condexec_cond = (insn >> 4) & 0xe; in disas_thumb_insn()
9393 s->condexec_mask = insn & 0x1f; in disas_thumb_insn()
9404 rn = (insn >> 3) & 0x7; in disas_thumb_insn()
9405 rd = insn & 0x7; in disas_thumb_insn()
9407 switch ((insn >> 6) & 3) { in disas_thumb_insn()
9421 tmp = tcg_const_i32((insn & (1 << 4)) != 0); in disas_thumb_insn()
9423 if (insn & 1) { in disas_thumb_insn()
9429 if (insn & 2) { in disas_thumb_insn()
9437 if (insn & (1 << 4)) in disas_thumb_insn()
9441 gen_set_psr_im(s, ((insn & 7) << 6), 0, shift); in disas_thumb_insn()
9455 rn = (insn >> 8) & 0x7; in disas_thumb_insn()
9458 if (insn & (1 << i)) { in disas_thumb_insn()
9459 if (insn & (1 << 11)) { in disas_thumb_insn()
9476 if ((insn & (1 << rn)) == 0) { in disas_thumb_insn()
9481 if (insn & (1 << 11)) { in disas_thumb_insn()
9490 cond = (insn >> 8) & 0xf; in disas_thumb_insn()
9507 offset = ((int32_t)insn << 24) >> 24; in disas_thumb_insn()
9513 if (insn & (1 << 11)) { in disas_thumb_insn()
9514 if (disas_thumb2_insn(env, s, insn)) in disas_thumb_insn()
9520 offset = ((int32_t)insn << 21) >> 21; in disas_thumb_insn()
9526 if (disas_thumb2_insn(env, s, insn)) in disas_thumb_insn()