40 #define TCG_GUEST_BASE_REG TCG_REG_R0
347                   | INSN_R2(TCG_REG_R0));  in tcg_out_mov()
356                   | INSN_R2(TCG_REG_R0) | INSN_IM14(arg));  in tcg_out_movi()
379         if (addr == TCG_REG_R0) {  in tcg_out_ldst()
441     tcg_out_arith(s, TCG_REG_R0, TCG_REG_R0, TCG_REG_R0, INSN_OR);  in tcg_out_nop()
569     tcg_out_vshd(s, ret, TCG_REG_R0, arg, creg);  in tcg_out_shr()
823         tcg_out_comclr(s, tcg_invert_cond(cond), TCG_REG_R0, al, bl, blconst);  in tcg_out_brcond2()
829         tcg_out_comclr(s, TCG_COND_NE, TCG_REG_R0, ah, bh, bhconst);  in tcg_out_brcond2()
859         tcg_out_comclr(s, TCG_COND_EQ, TCG_REG_R0, ah, bh, bhconst);  in tcg_out_setcond2()
865         tcg_out_comclr(s, TCG_COND_EQ, TCG_REG_R0, ah, bh, bhconst);  in tcg_out_setcond2()
867         tcg_out_comclr(s, cond, TCG_REG_R0, ah, bh, bhconst);  in tcg_out_setcond2()
998         if (addend_reg != TCG_REG_R0) {  in tcg_out_qemu_ld_direct()
1024     int datahi_reg = (opc == 3 ? *args++ : TCG_REG_R0);  in tcg_out_qemu_ld()
1029     int addrhi_reg = (TARGET_LONG_BITS == 64 ? *args++ : TCG_REG_R0);  in tcg_out_qemu_ld()
1088                            (GUEST_BASE ? TCG_GUEST_BASE_REG : TCG_REG_R0), opc);  in tcg_out_qemu_ld()
1139     int datahi_reg = (opc == 3 ? *args++ : TCG_REG_R0);  in tcg_out_qemu_st()
1144     int addrhi_reg = (TARGET_LONG_BITS == 64 ? *args++ : TCG_REG_R0);  in tcg_out_qemu_st()
1194             argreg = TCG_REG_R0;  in tcg_out_qemu_st()
1249         tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_R20, TCG_REG_R0,  in tcg_out_goto_tb()
1411         tcg_out_xmpyu(s, args[0], TCG_REG_R0, args[1], args[2]);  in tcg_out_op()
1671     tcg_regset_set_reg(s->reserved_regs, TCG_REG_R0);  /* hardwired to zero */  in tcg_target_init()