Lines Matching refs:mkU32
288 assign(t1, binop(Iop_Add32, getIReg(rs), mkU32(extend_s_16to32(imm)))); \
292 assign(t2, binop(Iop_And32, mkexpr(t1), mkU32(0xFFFFFFFC))); \
294 assign(t4, binop(Iop_And32, mkexpr(t1), mkU32(0x00000003)))
302 mkU32(0x0000001F) \
315 putIReg(rt, binop(op, getIReg(rs), mkU32(imm)));
323 binop(Iop_CmpEQ32, mkU32(cc), mkU32(0))), \
325 binop(Iop_Shr32, getFCSR(), mkU8(23))), mkU32(0x1)));
584 static IRExpr *mkU32(UInt i) in mkU32() function
668 assign(t0, unop(Iop_32to8, binop(Iop_And32, rs, mkU32(0x0000001F)))); in genRORV32()
693 stmt( IRStmt_Put( OFFB_PC, mkU32(d32) ) ); in jmp_lit()
705 return mode64 ? mkU64(0x0) : mkU32(0x0); in getIReg()
848 return mkU32(guest_PC_curr_instr + 4 + branch_offset); in dis_branch_likely()
857 putIReg(31, mkU32(guest_PC_curr_instr + 8)); in dis_branch()
931 putFCSR(binop(Iop_And32, getFCSR(), mkU32(0xFF7FFFFF))); in setFPUCondCode()
936 binop(Iop_Shl32, mkU32(0x01000000), mkU8(cc))))); in setFPUCondCode()
955 guest_FCSR), Ity_I32), mkU32(3))); in get_IR_roundingmode()
960 binop(Iop_Shl32, mkexpr(rm_MIPS), mkU8(1)), mkU32(2))); in get_IR_roundingmode()
1001 assign(ccMIPS, binop(Iop_Shl32, mkU32(1), unop(Iop_32to8, in dis_instr_CCondFmt()
1003 binop(Iop_Shr32, mkexpr(ccIR), mkU8(5))), mkU32(2)), in dis_instr_CCondFmt()
1006 mkU32(1)))))); in dis_instr_CCondFmt()
1007 assign(t0, binop(Iop_And32, mkexpr(ccMIPS), mkU32(0x1))); // UN in dis_instr_CCondFmt()
1009 mkU8(0x1)), mkU32(0x1))); // EQ in dis_instr_CCondFmt()
1011 mkexpr(ccMIPS), mkU8(0x2))), mkU32(0x1))); // NGT in dis_instr_CCondFmt()
1013 mkU8(0x3)), mkU32(0x1))); // LT in dis_instr_CCondFmt()
1017 setFPUCondCode(mkU32(0), fpc_cc); in dis_instr_CCondFmt()
1045 setFPUCondCode(mkU32(0), fpc_cc); in dis_instr_CCondFmt()
1097 assign(ccMIPS, binop(Iop_Shl32, mkU32(1), unop(Iop_32to8, in dis_instr_CCondFmt()
1099 binop(Iop_Shr32, mkexpr(ccIR), mkU8(5))), mkU32(2)), in dis_instr_CCondFmt()
1102 mkU32(1)))))); in dis_instr_CCondFmt()
1104 assign(t0, binop(Iop_And32, mkexpr(ccMIPS), mkU32(0x1))); // UN in dis_instr_CCondFmt()
1106 mkU8(0x1)), mkU32(0x1))); // EQ in dis_instr_CCondFmt()
1108 mkexpr(ccMIPS), mkU8(0x2))), mkU32(0x1))); // NGT in dis_instr_CCondFmt()
1110 mkU8(0x3)), mkU32(0x1))); // LT in dis_instr_CCondFmt()
1114 setFPUCondCode(mkU32(0), fpc_cc); in dis_instr_CCondFmt()
1142 setFPUCondCode(mkU32(0), fpc_cc); in dis_instr_CCondFmt()
1274 putPC(mkU32(guest_PC_curr_instr + 20)); in disInstr_MIPS_WRK()
1290 putIReg(31, mkU32(guest_PC_curr_instr + 20)); in disInstr_MIPS_WRK()
1329 putIReg(31, mkU32(guest_PC_curr_instr + 8)); in disInstr_MIPS_WRK()
1331 assign(t0, mkU32((guest_PC_curr_instr & 0xF0000000) | in disInstr_MIPS_WRK()
1338 assign(t0, mkU32((guest_PC_curr_instr & 0xF0000000) | in disInstr_MIPS_WRK()
1356 assign(t1, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(0), in disInstr_MIPS_WRK()
1357 mkU32(bc1_cc)))); in disInstr_MIPS_WRK()
1360 mkU8(24 + bc1_cc)), mkU32(0x1)), binop(Iop_And32, in disInstr_MIPS_WRK()
1362 mkU32(0x1)))); in disInstr_MIPS_WRK()
1367 assign(t3, binop(Iop_CmpEQ32, mkU32(1), mkexpr(t2))); in disInstr_MIPS_WRK()
1373 assign(t3, binop(Iop_CmpEQ32, mkU32(0), mkexpr(t2))); in disInstr_MIPS_WRK()
1379 mode64 ? mkU64(0x0) : mkU32(0x0)), imm); in disInstr_MIPS_WRK()
1384 mkU32(0x0)), imm); in disInstr_MIPS_WRK()
1543 mkU32(0x3F800000)), getLoFromF64(tyF, in disInstr_MIPS_WRK()
1574 assign(t3, unop(Iop_1Sto32, binop(Iop_CmpNE32, mkU32(0), in disInstr_MIPS_WRK()
1589 assign(t3, unop(Iop_1Sto32, binop(Iop_CmpNE32, mkU32(0), in disInstr_MIPS_WRK()
1611 assign(t3, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(0), in disInstr_MIPS_WRK()
1626 assign(t3, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(0), in disInstr_MIPS_WRK()
1648 assign(t1, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(0), in disInstr_MIPS_WRK()
1649 mkU32(mov_cc)))); in disInstr_MIPS_WRK()
1652 mkU8(24 + mov_cc)), mkU32(0x1)), in disInstr_MIPS_WRK()
1654 mkU8(23)), mkU32(0x1)))); in disInstr_MIPS_WRK()
1656 assign(t3, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(1), in disInstr_MIPS_WRK()
1675 assign(t1, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(0), in disInstr_MIPS_WRK()
1676 mkU32(mov_cc)))); in disInstr_MIPS_WRK()
1680 mkU32(0x1)), binop(Iop_And32, in disInstr_MIPS_WRK()
1682 mkU8(23)), mkU32(0x1)))); in disInstr_MIPS_WRK()
1684 assign(t3, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(1), in disInstr_MIPS_WRK()
1708 mkU32(0), mkU32(mov_cc)))); in disInstr_MIPS_WRK()
1711 mkU8(24 + mov_cc)), mkU32(0x1)), in disInstr_MIPS_WRK()
1713 mkU8(23)), mkU32(0x1)))); in disInstr_MIPS_WRK()
1715 assign(t3, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(1), in disInstr_MIPS_WRK()
1734 assign(t1, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(0), in disInstr_MIPS_WRK()
1735 mkU32(mov_cc)))); in disInstr_MIPS_WRK()
1738 mkU8(24 + mov_cc)), mkU32(0x1)), in disInstr_MIPS_WRK()
1740 mkU8(23)), mkU32(0x1)))); in disInstr_MIPS_WRK()
1742 assign(t3, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(1), in disInstr_MIPS_WRK()
1799 mkU32(0x000000FE)), mkU8(24))); in disInstr_MIPS_WRK()
1801 mkU32(0x01000000))); in disInstr_MIPS_WRK()
1803 mkU32(0x00000001)), mkU8(23))); in disInstr_MIPS_WRK()
1805 mkU32(0x007FFFFF))); in disInstr_MIPS_WRK()
1810 assign(t1, binop(Iop_And32, getFCSR(), mkU32(0xFFFC0000))); in disInstr_MIPS_WRK()
1812 mkU32(0x0003F000))); in disInstr_MIPS_WRK()
1813 assign(t3, binop(Iop_And32, getFCSR(), mkU32(0x00000F80))); in disInstr_MIPS_WRK()
1815 mkU32(0x0000007C))); in disInstr_MIPS_WRK()
1816 assign(t5, binop(Iop_And32, getFCSR(), mkU32(0x00000003))); in disInstr_MIPS_WRK()
1821 assign(t1, binop(Iop_And32, getFCSR(), mkU32(0xFE000000))); in disInstr_MIPS_WRK()
1823 mkU32(0x00000002)), mkU8(22))); in disInstr_MIPS_WRK()
1824 assign(t3, binop(Iop_And32, getFCSR(), mkU32(0x00FFF000))); in disInstr_MIPS_WRK()
1826 mkU32(0x00000F80))); in disInstr_MIPS_WRK()
1827 assign(t5, binop(Iop_And32, getFCSR(), mkU32(0x0000007C))); in disInstr_MIPS_WRK()
1829 mkU32(0x00000003))); in disInstr_MIPS_WRK()
1855 assign(t1, mkU32(0x000000FF)); in disInstr_MIPS_WRK()
1857 mkU32(0xFE000000)), mkU8(25))); in disInstr_MIPS_WRK()
1859 mkU32(0x00800000)), mkU8(23))); in disInstr_MIPS_WRK()
1864 assign(t1, mkU32(0xFFFFF07C)); in disInstr_MIPS_WRK()
1866 mkU32(0x0003F000))); in disInstr_MIPS_WRK()
1868 mkU32(0x0000007C))); in disInstr_MIPS_WRK()
1873 assign(t1, mkU32(0x00000F87)); in disInstr_MIPS_WRK()
1875 mkU32(0x00000F83))); in disInstr_MIPS_WRK()
1877 mkU32(0x01000000)), mkU8(22))); in disInstr_MIPS_WRK()
1978 putFReg(fd, binop(Iop_RoundF32toInt, mkU32(0x0), in disInstr_MIPS_WRK()
1986 assign(t0, binop(Iop_F64toI32S, mkU32(0x0), getDReg(fs))); in disInstr_MIPS_WRK()
2001 putFReg(fd, binop(Iop_RoundF32toInt, mkU32(0x1), in disInstr_MIPS_WRK()
2009 assign(t0, binop(Iop_F64toI32S, mkU32(0x1), getDReg(fs))); in disInstr_MIPS_WRK()
2024 putFReg(fd, binop(Iop_RoundF32toInt, mkU32(0x3), in disInstr_MIPS_WRK()
2032 assign(t0, binop(Iop_F64toI32S, mkU32(0x3), getDReg(fs))); in disInstr_MIPS_WRK()
2046 putFReg(fd, binop(Iop_RoundF32toInt, mkU32(0x2), in disInstr_MIPS_WRK()
2054 assign(t0, binop(Iop_F64toI32S, mkU32(0x2), getDReg(fs))); in disInstr_MIPS_WRK()
2088 unop(Iop_ReinterpI32asF32, mkU32(0x3F800000)), in disInstr_MIPS_WRK()
2124 IRExpr** args = mkIRExprVec_2 (mkU32(rd), mkU32(sel)); in disInstr_MIPS_WRK()
2160 mkU32(extend_s_16to32(imm + 4)))); in disInstr_MIPS_WRK()
2178 mkU32(extend_s_16to32(imm + 4)))); in disInstr_MIPS_WRK()
2224 ppIRExpr(mkU32(p)); in disInstr_MIPS_WRK()
2225 putIReg(rt, mkU32(p)); in disInstr_MIPS_WRK()
2245 assign(t1, binop(Iop_Add32, mkexpr(t0), mkU32(4))); in disInstr_MIPS_WRK()
2284 assign(t1, binop(Iop_Add32, mkexpr(t0), mkU32(4))); in disInstr_MIPS_WRK()
2404 assign(t1, binop(Iop_Add32, getIReg(rs), mkU32(extend_s_16to32(imm)))); in disInstr_MIPS_WRK()
2406 assign(t1, binop(Iop_Xor32, mkU32(0x3), binop(Iop_Add32, getIReg(rs), in disInstr_MIPS_WRK()
2407 mkU32(extend_s_16to32(imm))))); in disInstr_MIPS_WRK()
2417 binop(Iop_Shl32, binop(Iop_Sub32, mkU32(0x03), mkexpr(t4)), in disInstr_MIPS_WRK()
2423 mkU32(0xFFFFFFFF), narrowTo(Ity_I8, binop(Iop_Shl32, in disInstr_MIPS_WRK()
2424 binop(Iop_Add32, mkexpr(t4), mkU32(0x1)), mkU8(0x3)))))); in disInstr_MIPS_WRK()
2437 assign(t1, binop(Iop_Add32, getIReg(rs), mkU32(extend_s_16to32(imm)))); in disInstr_MIPS_WRK()
2439 assign(t1, binop(Iop_Xor32, mkU32(0x3), binop(Iop_Add32, getIReg(rs), in disInstr_MIPS_WRK()
2440 mkU32(extend_s_16to32(imm))))); in disInstr_MIPS_WRK()
2456 binop(Iop_Shr32, mkU32(0xFFFFFFFF), narrowTo(Ity_I8, in disInstr_MIPS_WRK()
2488 assign(t1, binop(Iop_Add32, getIReg(rs), mkU32(extend_s_16to32(imm)))); in disInstr_MIPS_WRK()
2490 assign(t1, binop(Iop_Xor32, mkU32(0x3), binop(Iop_Add32, getIReg(rs), in disInstr_MIPS_WRK()
2491 mkU32(extend_s_16to32(imm))))); in disInstr_MIPS_WRK()
2501 binop(Iop_Shl32, binop(Iop_Sub32, mkU32(0x03), mkexpr(t4)), in disInstr_MIPS_WRK()
2511 assign(t5, binop(Iop_Mul32, binop(Iop_Sub32, mkU32(0x3), mkexpr(t4)), in disInstr_MIPS_WRK()
2512 mkU32(0x8))); in disInstr_MIPS_WRK()
2514 assign(t6, binop(Iop_Shr32, mkU32(0xFFFFFFFF), narrowTo(Ity_I8, in disInstr_MIPS_WRK()
2516 assign(t7, binop(Iop_Xor32, mkU32(0xFFFFFFFF), mkexpr(t6))); in disInstr_MIPS_WRK()
2529 assign(t1, binop(Iop_Add32, getIReg(rs), mkU32(extend_s_16to32(imm)))); in disInstr_MIPS_WRK()
2531 assign(t1, binop(Iop_Xor32, mkU32(0x3), binop(Iop_Add32, getIReg(rs), in disInstr_MIPS_WRK()
2532 mkU32(extend_s_16to32(imm))))); in disInstr_MIPS_WRK()
2547 binop(Iop_Shl32, mkU32(0xFFFFFFFF), narrowTo(Ity_I8, in disInstr_MIPS_WRK()
2633 binop(Iop_Sub32, mkexpr(t1), mkU32(0x1)))); in disInstr_MIPS_WRK()
2660 mkexpr(t1), binop(Iop_Sub32, mkexpr(t1), mkU32(0x1)))); in disInstr_MIPS_WRK()
2671 mkU32(0)))); in disInstr_MIPS_WRK()
2673 unop(Iop_Clz32, getIReg(rs)), mkU32(0x00000020))); in disInstr_MIPS_WRK()
2681 mkU32(0xffffffff)))); in disInstr_MIPS_WRK()
2684 mkU32(0x00000020))); in disInstr_MIPS_WRK()
2791 mkU32(0x00FF0000)), mkU8(0x8))); in disInstr_MIPS_WRK()
2793 mkU32(0xFF000000)), mkU8(0x8))); in disInstr_MIPS_WRK()
2795 mkU32(0x000000FF)), mkU8(0x8))); in disInstr_MIPS_WRK()
2797 mkU32(0x0000FF00)), mkU8(0x8))); in disInstr_MIPS_WRK()
2839 assign(t1, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(0), in disInstr_MIPS_WRK()
2840 mkU32(mov_cc)))); in disInstr_MIPS_WRK()
2843 mkU8(24 + mov_cc)), mkU32(0x1)), binop(Iop_And32, in disInstr_MIPS_WRK()
2845 mkU32(0x1)))); in disInstr_MIPS_WRK()
2847 assign(t3, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(0), in disInstr_MIPS_WRK()
2861 assign(t1, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(0), in disInstr_MIPS_WRK()
2862 mkU32(mov_cc)))); in disInstr_MIPS_WRK()
2865 mkU8(24 + mov_cc)), mkU32(0x1)), binop(Iop_And32, in disInstr_MIPS_WRK()
2867 mkU32(0x1)))); in disInstr_MIPS_WRK()
2869 assign(t3, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(1), in disInstr_MIPS_WRK()
2885 mkU32(0x0)))); in disInstr_MIPS_WRK()
2887 mkU32(0x0)))); in disInstr_MIPS_WRK()
2902 mkU32(0x0)))); in disInstr_MIPS_WRK()
2904 mkU32(0x0)))); in disInstr_MIPS_WRK()
3034 putIReg(rd, mkU32(guest_PC_curr_instr + 8)); in disInstr_MIPS_WRK()
3042 putPC(mkU32(guest_PC_curr_instr + 4)); in disInstr_MIPS_WRK()
3162 (mkU32(lsb))); in disInstr_MIPS_WRK()
3182 mkU32(0x80000000)), mkU32(0x0)), imm, &bstmt); in disInstr_MIPS_WRK()
3190 :mkU32(0x80000000)), in disInstr_MIPS_WRK()
3191 mkU32(0x0)), imm); in disInstr_MIPS_WRK()
3197 mkU32(0x80000000)), mkU32(0x80000000)), imm, &bstmt); in disInstr_MIPS_WRK()
3203 getIReg(rs), mkU32(0x80000000)), in disInstr_MIPS_WRK()
3204 mkU32(0x80000000)), imm); in disInstr_MIPS_WRK()
3210 mkU32(0x80000000)), mkU32(0x80000000)), imm, &bstmt); in disInstr_MIPS_WRK()
3215 putIReg(31, mkU32(guest_PC_curr_instr + 8)); in disInstr_MIPS_WRK()
3217 getIReg(rs), mkU32(0x80000000)), in disInstr_MIPS_WRK()
3218 mkU32(0x80000000)), imm); in disInstr_MIPS_WRK()
3224 mkU32(0x80000000)), mkU32(0x0)), imm, &bstmt); in disInstr_MIPS_WRK()
3229 putIReg(31, mkU32(guest_PC_curr_instr + 8)); in disInstr_MIPS_WRK()
3231 getIReg(rs), mkU32(0x80000000)), in disInstr_MIPS_WRK()
3232 mkU32(0x0)), imm); in disInstr_MIPS_WRK()
3237 stmt (IRStmt_Exit (binop (Iop_CmpLT32S, mkU32 (imm), getIReg (rs)), in disInstr_MIPS_WRK()
3244 stmt (IRStmt_Exit (binop (Iop_CmpLT32U, mkU32 (imm), getIReg (rs)), in disInstr_MIPS_WRK()
3251 stmt (IRStmt_Exit (binop (Iop_CmpLT32S, getIReg (rs), mkU32 (imm)), in disInstr_MIPS_WRK()
3258 stmt (IRStmt_Exit (binop (Iop_CmpLT32U, getIReg (rs), mkU32 (imm)), in disInstr_MIPS_WRK()
3265 stmt (IRStmt_Exit (binop (Iop_CmpEQ32, getIReg (rs), mkU32 (imm)), in disInstr_MIPS_WRK()
3272 stmt (IRStmt_Exit (binop (Iop_CmpNE32, getIReg (rs), mkU32 (imm)), in disInstr_MIPS_WRK()
3314 mkU32(0x00))), imm, &bstmt); in disInstr_MIPS_WRK()
3319 lastn = dis_branch_likely(binop(Iop_CmpLE32S, getIReg(rs), mkU32(0x00)), in disInstr_MIPS_WRK()
3325 dis_branch(False,binop(Iop_CmpLE32S, getIReg(rs), mkU32(0x0)), imm, in disInstr_MIPS_WRK()
3332 getIReg(rs), mkU32(0x0)))), imm); in disInstr_MIPS_WRK()
3337 putIReg(rt, binop(Iop_Add32, getIReg(rs), mkU32(extend_s_16to32(imm)))); in disInstr_MIPS_WRK()
3342 putIReg(rt, binop(Iop_Add32, getIReg(rs), mkU32(extend_s_16to32(imm)))); in disInstr_MIPS_WRK()
3363 mkU32(extend_s_16to32(imm))))); in disInstr_MIPS_WRK()
3369 mkU32(extend_s_16to32(imm))))); in disInstr_MIPS_WRK()
3415 mkU32(guest_PC_curr_instr))); in disInstr_MIPS_WRK()
3428 putPC(mkU32(guest_PC_curr_instr + 4)); in disInstr_MIPS_WRK()
3450 putPC(mkU32(guest_PC_curr_instr + 4)); in disInstr_MIPS_WRK()
3454 putPC(mkU32(dres.continueAt)); in disInstr_MIPS_WRK()
3469 putPC(mkU32(guest_PC_curr_instr + 4)); in disInstr_MIPS_WRK()