Lines Matching refs:addInstr
176 static void addInstr ( ISelEnv* env, AMD64Instr* instr ) in addInstr() function
323 addInstr(env, in add_to_rsp()
331 addInstr(env, in sub_from_rsp()
343 addInstr( env, AMD64Instr_Push(AMD64RMI_Imm( (UInt)uimm64 )) ); in push_uimm64()
346 addInstr( env, AMD64Instr_Imm64(uimm64, tmp) ); in push_uimm64()
347 addInstr( env, AMD64Instr_Push(AMD64RMI_Reg(tmp)) ); in push_uimm64()
530 addInstr(env, fastinstrs[i]); in doHelperCall()
551 addInstr(env, mk_iMOVsd_RR( hregAMD64_RBP(), tmpregs[argreg])); in doHelperCall()
581 addInstr( env, mk_iMOVsd_RR( tmpregs[i], argregs[i] ) ); in doHelperCall()
587 addInstr(env, AMD64Instr_Call( in doHelperCall()
624 addInstr(env, mk_iMOVsd_RR(roff, tmp)); in genGuestArrayOffset()
629 addInstr(env, in genGuestArrayOffset()
632 addInstr(env, in genGuestArrayOffset()
650 addInstr(env, AMD64Instr_Push(AMD64RMI_Imm(DEFAULT_MXCSR))); in set_SSE_rounding_default()
651 addInstr(env, AMD64Instr_LdMXCSR(zero_rsp)); in set_SSE_rounding_default()
664 addInstr(env, AMD64Instr_Alu64M( in set_FPU_rounding_default()
666 addInstr(env, AMD64Instr_A87LdCW(m8_rsp)); in set_FPU_rounding_default()
693 addInstr(env, AMD64Instr_Alu64R(Aalu_MOV, AMD64RMI_Imm(3), reg)); in set_SSE_rounding_mode()
694 addInstr(env, AMD64Instr_Alu64R(Aalu_AND, in set_SSE_rounding_mode()
696 addInstr(env, AMD64Instr_Sh64(Ash_SHL, 13, reg)); in set_SSE_rounding_mode()
697 addInstr(env, AMD64Instr_Alu64R( in set_SSE_rounding_mode()
699 addInstr(env, AMD64Instr_Push(AMD64RMI_Reg(reg))); in set_SSE_rounding_mode()
700 addInstr(env, AMD64Instr_LdMXCSR(zero_rsp)); in set_SSE_rounding_mode()
724 addInstr(env, mk_iMOVsd_RR(rrm, rrm2)); in set_FPU_rounding_mode()
725 addInstr(env, AMD64Instr_Alu64R(Aalu_AND, AMD64RMI_Imm(3), rrm2)); in set_FPU_rounding_mode()
726 addInstr(env, AMD64Instr_Sh64(Ash_SHL, 10, rrm2)); in set_FPU_rounding_mode()
727 addInstr(env, AMD64Instr_Alu64R(Aalu_OR, in set_FPU_rounding_mode()
729 addInstr(env, AMD64Instr_Alu64M(Aalu_MOV, in set_FPU_rounding_mode()
731 addInstr(env, AMD64Instr_A87LdCW(m8_rsp)); in set_FPU_rounding_mode()
740 addInstr(env, AMD64Instr_SseReRg(Asse_XOR, dst, dst)); in generate_zeroes_V128()
749 addInstr(env, AMD64Instr_SseReRg(Asse_CMPEQ32, dst, dst)); in generate_ones_V128()
760 addInstr(env, AMD64Instr_SseReRg(Asse_XOR, src, dst)); in do_sse_NotV128()
845 addInstr(env, AMD64Instr_Alu64R(Aalu_MOV, in iselIntExpr_R_wrk()
850 addInstr(env, AMD64Instr_LoadEX(4,False,amode,dst)); in iselIntExpr_R_wrk()
854 addInstr(env, AMD64Instr_LoadEX(2,False,amode,dst)); in iselIntExpr_R_wrk()
858 addInstr(env, AMD64Instr_LoadEX(1,False,amode,dst)); in iselIntExpr_R_wrk()
875 addInstr(env, mk_iMOVsd_RR(reg,dst)); in iselIntExpr_R_wrk()
876 addInstr(env, AMD64Instr_Unary64(Aun_NEG,dst)); in iselIntExpr_R_wrk()
903 addInstr(env, mk_iMOVsd_RR(reg,dst)); in iselIntExpr_R_wrk()
904 addInstr(env, AMD64Instr_Alu64R(aluOp, rmi, dst)); in iselIntExpr_R_wrk()
924 addInstr(env, mk_iMOVsd_RR(regL,dst)); in iselIntExpr_R_wrk()
933 addInstr(env, AMD64Instr_Alu64R( in iselIntExpr_R_wrk()
937 addInstr(env, AMD64Instr_Alu64R( in iselIntExpr_R_wrk()
941 addInstr(env, AMD64Instr_MovxLQ(False, dst, dst)); in iselIntExpr_R_wrk()
944 addInstr(env, AMD64Instr_Sh64(Ash_SHL, 56, dst)); in iselIntExpr_R_wrk()
945 addInstr(env, AMD64Instr_Sh64(Ash_SAR, 56, dst)); in iselIntExpr_R_wrk()
948 addInstr(env, AMD64Instr_Sh64(Ash_SHL, 48, dst)); in iselIntExpr_R_wrk()
949 addInstr(env, AMD64Instr_Sh64(Ash_SAR, 48, dst)); in iselIntExpr_R_wrk()
952 addInstr(env, AMD64Instr_MovxLQ(True, dst, dst)); in iselIntExpr_R_wrk()
969 addInstr(env, AMD64Instr_Sh64(shOp, nshift, dst)); in iselIntExpr_R_wrk()
973 addInstr(env, mk_iMOVsd_RR(regR,hregAMD64_RCX())); in iselIntExpr_R_wrk()
974 addInstr(env, AMD64Instr_Sh64(shOp, 0/* %cl */, dst)); in iselIntExpr_R_wrk()
1126 addInstr(env, AMD64Instr_MovxLQ(False, argR, argR)); in iselIntExpr_R_wrk()
1127 addInstr(env, mk_iMOVsd_RR(argL, hregAMD64_RDI()) ); in iselIntExpr_R_wrk()
1128 addInstr(env, mk_iMOVsd_RR(argR, hregAMD64_RSI()) ); in iselIntExpr_R_wrk()
1129 addInstr(env, AMD64Instr_Call( Acc_ALWAYS, (ULong)fn, 2 )); in iselIntExpr_R_wrk()
1130 addInstr(env, mk_iMOVsd_RR(hregAMD64_RAX(), dst)); in iselIntExpr_R_wrk()
1140 addInstr(env, mk_iMOVsd_RR(src1, dst)); in iselIntExpr_R_wrk()
1141 addInstr(env, AMD64Instr_Alu32R(Aalu_CMP, AMD64RMI_Reg(src2), dst)); in iselIntExpr_R_wrk()
1142 addInstr(env, AMD64Instr_CMov64(Acc_B, AMD64RM_Reg(src2), dst)); in iselIntExpr_R_wrk()
1159 addInstr(env, mk_iMOVsd_RR(left64, rdx)); in iselIntExpr_R_wrk()
1160 addInstr(env, mk_iMOVsd_RR(left64, rax)); in iselIntExpr_R_wrk()
1161 addInstr(env, AMD64Instr_Sh64(Ash_SHR, 32, rdx)); in iselIntExpr_R_wrk()
1162 addInstr(env, AMD64Instr_Div(syned, 4, rmRight)); in iselIntExpr_R_wrk()
1163 addInstr(env, AMD64Instr_MovxLQ(False, rdx, rdx)); in iselIntExpr_R_wrk()
1164 addInstr(env, AMD64Instr_MovxLQ(False, rax, rax)); in iselIntExpr_R_wrk()
1165 addInstr(env, AMD64Instr_Sh64(Ash_SHL, 32, rdx)); in iselIntExpr_R_wrk()
1166 addInstr(env, mk_iMOVsd_RR(rax, dst)); in iselIntExpr_R_wrk()
1167 addInstr(env, AMD64Instr_Alu64R(Aalu_OR, AMD64RMI_Reg(rdx), dst)); in iselIntExpr_R_wrk()
1176 addInstr(env, mk_iMOVsd_RR(hi32s, hi32)); in iselIntExpr_R_wrk()
1177 addInstr(env, mk_iMOVsd_RR(lo32s, lo32)); in iselIntExpr_R_wrk()
1178 addInstr(env, AMD64Instr_Sh64(Ash_SHL, 32, hi32)); in iselIntExpr_R_wrk()
1179 addInstr(env, AMD64Instr_MovxLQ(False, lo32, lo32)); in iselIntExpr_R_wrk()
1180 addInstr(env, AMD64Instr_Alu64R( in iselIntExpr_R_wrk()
1190 addInstr(env, mk_iMOVsd_RR(hi16s, hi16)); in iselIntExpr_R_wrk()
1191 addInstr(env, mk_iMOVsd_RR(lo16s, lo16)); in iselIntExpr_R_wrk()
1192 addInstr(env, AMD64Instr_Sh64(Ash_SHL, 16, hi16)); in iselIntExpr_R_wrk()
1193 addInstr(env, AMD64Instr_Alu64R( in iselIntExpr_R_wrk()
1195 addInstr(env, AMD64Instr_Alu64R( in iselIntExpr_R_wrk()
1205 addInstr(env, mk_iMOVsd_RR(hi8s, hi8)); in iselIntExpr_R_wrk()
1206 addInstr(env, mk_iMOVsd_RR(lo8s, lo8)); in iselIntExpr_R_wrk()
1207 addInstr(env, AMD64Instr_Sh64(Ash_SHL, 8, hi8)); in iselIntExpr_R_wrk()
1208 addInstr(env, AMD64Instr_Alu64R( in iselIntExpr_R_wrk()
1210 addInstr(env, AMD64Instr_Alu64R( in iselIntExpr_R_wrk()
1237 addInstr(env, mk_iMOVsd_RR(a32s, a32)); in iselIntExpr_R_wrk()
1238 addInstr(env, mk_iMOVsd_RR(b32s, b32)); in iselIntExpr_R_wrk()
1239 addInstr(env, AMD64Instr_Sh64(Ash_SHL, shift, a32)); in iselIntExpr_R_wrk()
1240 addInstr(env, AMD64Instr_Sh64(Ash_SHL, shift, b32)); in iselIntExpr_R_wrk()
1241 addInstr(env, AMD64Instr_Sh64(shr_op, shift, a32)); in iselIntExpr_R_wrk()
1242 addInstr(env, AMD64Instr_Sh64(shr_op, shift, b32)); in iselIntExpr_R_wrk()
1243 addInstr(env, AMD64Instr_Alu64R(Aalu_MUL, AMD64RMI_Reg(a32), b32)); in iselIntExpr_R_wrk()
1251 addInstr(env, AMD64Instr_SseUComIS(8,fL,fR,dst)); in iselIntExpr_R_wrk()
1254 addInstr(env, AMD64Instr_Alu64R(Aalu_AND, AMD64RMI_Imm(0x45), dst)); in iselIntExpr_R_wrk()
1264 addInstr(env, AMD64Instr_SseSF2SI( 8, szD, rf, dst )); in iselIntExpr_R_wrk()
1283 addInstr(env, mk_iMOVsd_RR(src,dst) ); in iselIntExpr_R_wrk()
1284 addInstr(env, AMD64Instr_Alu64R(Aalu_AND, in iselIntExpr_R_wrk()
1298 addInstr(env, AMD64Instr_LoadEX(1,False,amode,dst)); in iselIntExpr_R_wrk()
1311 addInstr(env, AMD64Instr_LoadEX(2,False,amode,dst)); in iselIntExpr_R_wrk()
1338 addInstr(env, mk_iMOVsd_RR(reg,dst)); in iselIntExpr_R_wrk()
1339 addInstr(env, AMD64Instr_Alu32R(aluOp, rmi, dst)); in iselIntExpr_R_wrk()
1351 addInstr(env, AMD64Instr_MovxLQ(e->Iex.Unop.op == Iop_32Sto64, in iselIntExpr_R_wrk()
1375 addInstr(env, mk_iMOVsd_RR(src,dst) ); in iselIntExpr_R_wrk()
1376 addInstr(env, AMD64Instr_Alu64R(Aalu_AND, in iselIntExpr_R_wrk()
1390 addInstr(env, mk_iMOVsd_RR(src,dst) ); in iselIntExpr_R_wrk()
1391 addInstr(env, AMD64Instr_Sh64(Ash_SHL, amt, dst)); in iselIntExpr_R_wrk()
1392 addInstr(env, AMD64Instr_Sh64(Ash_SAR, amt, dst)); in iselIntExpr_R_wrk()
1401 addInstr(env, mk_iMOVsd_RR(src,dst) ); in iselIntExpr_R_wrk()
1402 addInstr(env, AMD64Instr_Unary64(Aun_NOT,dst)); in iselIntExpr_R_wrk()
1417 addInstr(env, mk_iMOVsd_RR(src,dst) ); in iselIntExpr_R_wrk()
1418 addInstr(env, AMD64Instr_Sh64(Ash_SHR, shift, dst)); in iselIntExpr_R_wrk()
1426 addInstr(env, AMD64Instr_Set64(cond,dst)); in iselIntExpr_R_wrk()
1436 addInstr(env, AMD64Instr_Set64(cond,dst)); in iselIntExpr_R_wrk()
1437 addInstr(env, AMD64Instr_Sh64(Ash_SHL, 63, dst)); in iselIntExpr_R_wrk()
1438 addInstr(env, AMD64Instr_Sh64(Ash_SAR, 63, dst)); in iselIntExpr_R_wrk()
1445 addInstr(env, AMD64Instr_Bsfr64(True,src,dst)); in iselIntExpr_R_wrk()
1455 addInstr(env, AMD64Instr_Bsfr64(False,src,tmp)); in iselIntExpr_R_wrk()
1456 addInstr(env, AMD64Instr_Alu64R(Aalu_MOV, in iselIntExpr_R_wrk()
1458 addInstr(env, AMD64Instr_Alu64R(Aalu_SUB, in iselIntExpr_R_wrk()
1466 addInstr(env, mk_iMOVsd_RR(src,dst)); in iselIntExpr_R_wrk()
1467 addInstr(env, AMD64Instr_Unary64(Aun_NEG,dst)); in iselIntExpr_R_wrk()
1468 addInstr(env, AMD64Instr_Alu64R(Aalu_OR, in iselIntExpr_R_wrk()
1470 addInstr(env, AMD64Instr_Sh64(Ash_SAR, 63, dst)); in iselIntExpr_R_wrk()
1478 addInstr(env, mk_iMOVsd_RR(pre,src)); in iselIntExpr_R_wrk()
1479 addInstr(env, AMD64Instr_MovxLQ(False, src, src)); in iselIntExpr_R_wrk()
1480 addInstr(env, mk_iMOVsd_RR(src,dst)); in iselIntExpr_R_wrk()
1481 addInstr(env, AMD64Instr_Unary64(Aun_NEG,dst)); in iselIntExpr_R_wrk()
1482 addInstr(env, AMD64Instr_Alu64R(Aalu_OR, in iselIntExpr_R_wrk()
1484 addInstr(env, AMD64Instr_Sh64(Ash_SAR, 63, dst)); in iselIntExpr_R_wrk()
1494 addInstr(env, mk_iMOVsd_RR(src, dst)); in iselIntExpr_R_wrk()
1495 addInstr(env, AMD64Instr_Unary64(Aun_NEG, dst)); in iselIntExpr_R_wrk()
1496 addInstr(env, AMD64Instr_Alu64R(Aalu_OR, AMD64RMI_Reg(src), dst)); in iselIntExpr_R_wrk()
1504 addInstr(env, AMD64Instr_SseLdSt(False/*store*/, 16, vec, rsp_m16)); in iselIntExpr_R_wrk()
1505 addInstr(env, AMD64Instr_LoadEX(4, False/*z-widen*/, rsp_m16, dst)); in iselIntExpr_R_wrk()
1518 addInstr(env, AMD64Instr_SseLdSt(False/*store*/, in iselIntExpr_R_wrk()
1520 addInstr(env, AMD64Instr_Alu64R( Aalu_MOV, in iselIntExpr_R_wrk()
1544 addInstr(env, AMD64Instr_SseLdSt(False/*store*/, in iselIntExpr_R_wrk()
1546 addInstr(env, AMD64Instr_Alu64R( Aalu_MOV, in iselIntExpr_R_wrk()
1560 addInstr(env, AMD64Instr_SseLdSt(False/*store*/, 8, src, m8_rsp)); in iselIntExpr_R_wrk()
1561 addInstr(env, AMD64Instr_Alu64R( in iselIntExpr_R_wrk()
1575 addInstr(env, AMD64Instr_SseLdSt(False/*store*/, 4, src, m8_rsp)); in iselIntExpr_R_wrk()
1576 addInstr(env, AMD64Instr_LoadEX(4, False/*unsigned*/, m8_rsp, dst )); in iselIntExpr_R_wrk()
1612 addInstr(env, mk_iMOVsd_RR(arg, hregAMD64_RDI()) ); in iselIntExpr_R_wrk()
1613 addInstr(env, AMD64Instr_Call( Acc_ALWAYS, (ULong)fn, 1 )); in iselIntExpr_R_wrk()
1614 addInstr(env, mk_iMOVsd_RR(hregAMD64_RAX(), dst)); in iselIntExpr_R_wrk()
1625 addInstr(env, AMD64Instr_Alu64R( in iselIntExpr_R_wrk()
1635 addInstr(env, AMD64Instr_LoadEX( in iselIntExpr_R_wrk()
1652 addInstr(env, AMD64Instr_LoadEX( 1, False, am, dst )); in iselIntExpr_R_wrk()
1656 addInstr(env, AMD64Instr_Alu64R( Aalu_MOV, AMD64RMI_Mem(am), dst )); in iselIntExpr_R_wrk()
1678 addInstr(env, mk_iMOVsd_RR(hregAMD64_RAX(), dst)); in iselIntExpr_R_wrk()
1680 addInstr(env, AMD64Instr_MovxLQ(False, hregAMD64_RAX(), dst)); in iselIntExpr_R_wrk()
1690 addInstr(env, AMD64Instr_Imm64(e->Iex.Const.con->Ico.U64, r)); in iselIntExpr_R_wrk()
1695 addInstr(env, AMD64Instr_Alu64R(Aalu_MOV, rmi, r)); in iselIntExpr_R_wrk()
1707 addInstr(env, mk_iMOVsd_RR(rX,dst)); in iselIntExpr_R_wrk()
1709 addInstr(env, AMD64Instr_Test64(0xFF, r8)); in iselIntExpr_R_wrk()
1710 addInstr(env, AMD64Instr_CMov64(Acc_Z,r0,dst)); in iselIntExpr_R_wrk()
1727 addInstr(env, AMD64Instr_A87Free(2)); in iselIntExpr_R_wrk()
1730 addInstr(env, AMD64Instr_SseLdSt(False/*store*/, 8, arg2, m8_rsp)); in iselIntExpr_R_wrk()
1731 addInstr(env, AMD64Instr_A87PushPop(m8_rsp, True/*push*/, 8)); in iselIntExpr_R_wrk()
1734 addInstr(env, AMD64Instr_SseLdSt(False/*store*/, 8, arg1, m8_rsp)); in iselIntExpr_R_wrk()
1735 addInstr(env, AMD64Instr_A87PushPop(m8_rsp, True/*push*/, 8)); in iselIntExpr_R_wrk()
1739 addInstr(env, AMD64Instr_A87FpOp(Afp_PREM)); in iselIntExpr_R_wrk()
1742 addInstr(env, AMD64Instr_A87FpOp(Afp_PREM1)); in iselIntExpr_R_wrk()
1749 addInstr(env, AMD64Instr_A87StSW(m8_rsp)); in iselIntExpr_R_wrk()
1750 addInstr(env, AMD64Instr_Alu64R(Aalu_MOV,AMD64RMI_Mem(m8_rsp),dst)); in iselIntExpr_R_wrk()
1751 addInstr(env, AMD64Instr_Alu64R(Aalu_AND,AMD64RMI_Imm(0x4700),dst)); in iselIntExpr_R_wrk()
2059 addInstr(env, mk_iMOVsd_RR(r64,dst)); in iselCondCode_wrk()
2060 addInstr(env, AMD64Instr_Alu64R(Aalu_AND,AMD64RMI_Imm(1),dst)); in iselCondCode_wrk()
2071 addInstr(env, AMD64Instr_Alu64R(Aalu_MOV,AMD64RMI_Imm(0),r)); in iselCondCode_wrk()
2072 addInstr(env, AMD64Instr_Alu64R(Aalu_XOR,AMD64RMI_Reg(r),r)); in iselCondCode_wrk()
2087 addInstr(env, AMD64Instr_Test64(1,reg)); in iselCondCode_wrk()
2096 addInstr(env, AMD64Instr_Test64(1,reg)); in iselCondCode_wrk()
2106 addInstr(env, AMD64Instr_Test64(0xFF,r)); in iselCondCode_wrk()
2116 addInstr(env, AMD64Instr_Test64(0xFFFF,r)); in iselCondCode_wrk()
2127 addInstr(env, AMD64Instr_Alu32R(Aalu_CMP,rmi2,r1)); in iselCondCode_wrk()
2142 addInstr(env, mk_iMOVsd_RR(r0, tmp)); in iselCondCode_wrk()
2143 addInstr(env, AMD64Instr_Alu64R(Aalu_OR,rmi1,tmp)); in iselCondCode_wrk()
2153 addInstr(env, AMD64Instr_Alu64R(Aalu_CMP,rmi2,r1)); in iselCondCode_wrk()
2168 addInstr(env, mk_iMOVsd_RR(r1,r)); in iselCondCode_wrk()
2169 addInstr(env, AMD64Instr_Alu64R(Aalu_XOR,rmi2,r)); in iselCondCode_wrk()
2170 addInstr(env, AMD64Instr_Alu64R(Aalu_AND,AMD64RMI_Imm(0xFF),r)); in iselCondCode_wrk()
2187 addInstr(env, mk_iMOVsd_RR(r1,r)); in iselCondCode_wrk()
2188 addInstr(env, AMD64Instr_Alu64R(Aalu_XOR,rmi2,r)); in iselCondCode_wrk()
2189 addInstr(env, AMD64Instr_Alu64R(Aalu_AND,AMD64RMI_Imm(0xFFFF),r)); in iselCondCode_wrk()
2211 addInstr(env, AMD64Instr_Imm64(con->Iex.Const.con->Ico.U64, tmp)); in iselCondCode_wrk()
2212 addInstr(env, AMD64Instr_Alu64R(Aalu_CMP, in iselCondCode_wrk()
2229 addInstr(env, AMD64Instr_Alu64R(Aalu_CMP,rmi2,r1)); in iselCondCode_wrk()
2253 addInstr(env, AMD64Instr_Alu32R(Aalu_CMP,rmi2,r1)); in iselCondCode_wrk()
2319 addInstr(env, mk_iMOVsd_RR(rRight, hregAMD64_RAX())); in iselInt128Expr_wrk()
2320 addInstr(env, AMD64Instr_MulL(syned, rmLeft)); in iselInt128Expr_wrk()
2322 addInstr(env, mk_iMOVsd_RR(hregAMD64_RDX(), tHi)); in iselInt128Expr_wrk()
2323 addInstr(env, mk_iMOVsd_RR(hregAMD64_RAX(), tLo)); in iselInt128Expr_wrk()
2340 addInstr(env, mk_iMOVsd_RR(sHi, hregAMD64_RDX())); in iselInt128Expr_wrk()
2341 addInstr(env, mk_iMOVsd_RR(sLo, hregAMD64_RAX())); in iselInt128Expr_wrk()
2342 addInstr(env, AMD64Instr_Div(syned, 8, rmRight)); in iselInt128Expr_wrk()
2343 addInstr(env, mk_iMOVsd_RR(hregAMD64_RDX(), tHi)); in iselInt128Expr_wrk()
2344 addInstr(env, mk_iMOVsd_RR(hregAMD64_RAX(), tLo)); in iselInt128Expr_wrk()
2399 addInstr(env, AMD64Instr_SseLdSt(True/*load*/, 4, res, am)); in iselFltExpr_wrk()
2411 addInstr(env, AMD64Instr_SseSDSS(True/*D->S*/,src,dst)); in iselFltExpr_wrk()
2420 addInstr(env, AMD64Instr_SseLdSt( True/*load*/, 4, res, am )); in iselFltExpr_wrk()
2431 addInstr(env, AMD64Instr_Store(4, src, m4_rsp)); in iselFltExpr_wrk()
2432 addInstr(env, AMD64Instr_SseLdSt( True/*load*/, 4, dst, m4_rsp )); in iselFltExpr_wrk()
2447 addInstr(env, AMD64Instr_SseLdSt(False/*store*/, 4, arg, m8_rsp)); in iselFltExpr_wrk()
2448 addInstr(env, AMD64Instr_A87Free(1)); in iselFltExpr_wrk()
2449 addInstr(env, AMD64Instr_A87PushPop(m8_rsp, True/*push*/, 4)); in iselFltExpr_wrk()
2450 addInstr(env, AMD64Instr_A87FpOp(Afp_ROUND)); in iselFltExpr_wrk()
2451 addInstr(env, AMD64Instr_A87PushPop(m8_rsp, False/*pop*/, 4)); in iselFltExpr_wrk()
2452 addInstr(env, AMD64Instr_SseLdSt(True/*load*/, 4, dst, m8_rsp)); in iselFltExpr_wrk()
2532 addInstr(env, AMD64Instr_Imm64(u.u64, tmp)); in iselDblExpr_wrk()
2533 addInstr(env, AMD64Instr_Push(AMD64RMI_Reg(tmp))); in iselDblExpr_wrk()
2534 addInstr(env, AMD64Instr_SseLdSt( in iselDblExpr_wrk()
2547 addInstr(env, AMD64Instr_SseLdSt( True/*load*/, 8, res, am )); in iselDblExpr_wrk()
2555 addInstr(env, AMD64Instr_SseLdSt( True/*load*/, 8, res, am )); in iselDblExpr_wrk()
2565 addInstr(env, AMD64Instr_SseLdSt( True/*load*/, 8, res, am )); in iselDblExpr_wrk()
2583 addInstr(env, mk_vMOVsd_RR(argL, dst)); in iselDblExpr_wrk()
2586 addInstr(env, AMD64Instr_Sse64FLo(op, argR, dst)); in iselDblExpr_wrk()
2602 addInstr(env, AMD64Instr_SseLdSt(False/*store*/, 8, arg, m8_rsp)); in iselDblExpr_wrk()
2603 addInstr(env, AMD64Instr_A87Free(1)); in iselDblExpr_wrk()
2604 addInstr(env, AMD64Instr_A87PushPop(m8_rsp, True/*push*/, 8)); in iselDblExpr_wrk()
2605 addInstr(env, AMD64Instr_A87FpOp(Afp_ROUND)); in iselDblExpr_wrk()
2606 addInstr(env, AMD64Instr_A87PushPop(m8_rsp, False/*pop*/, 8)); in iselDblExpr_wrk()
2607 addInstr(env, AMD64Instr_SseLdSt(True/*load*/, 8, dst, m8_rsp)); in iselDblExpr_wrk()
2631 addInstr(env, AMD64Instr_A87Free(2)); in iselDblExpr_wrk()
2634 addInstr(env, AMD64Instr_SseLdSt( in iselDblExpr_wrk()
2636 addInstr(env, AMD64Instr_A87PushPop(m8_rsp, True/*push*/, 8)); in iselDblExpr_wrk()
2639 addInstr(env, AMD64Instr_SseLdSt( in iselDblExpr_wrk()
2641 addInstr(env, AMD64Instr_A87PushPop(m8_rsp, True/*push*/, 8)); in iselDblExpr_wrk()
2648 addInstr(env, AMD64Instr_A87FpOp(Afp_SCALE)); in iselDblExpr_wrk()
2651 addInstr(env, AMD64Instr_A87FpOp(Afp_ATAN)); in iselDblExpr_wrk()
2654 addInstr(env, AMD64Instr_A87FpOp(Afp_YL2X)); in iselDblExpr_wrk()
2657 addInstr(env, AMD64Instr_A87FpOp(Afp_YL2XP1)); in iselDblExpr_wrk()
2660 addInstr(env, AMD64Instr_A87FpOp(Afp_PREM)); in iselDblExpr_wrk()
2663 addInstr(env, AMD64Instr_A87FpOp(Afp_PREM1)); in iselDblExpr_wrk()
2670 addInstr(env, AMD64Instr_A87PushPop(m8_rsp, False/*pop*/, 8)); in iselDblExpr_wrk()
2671 addInstr(env, AMD64Instr_SseLdSt(True/*load*/, 8, dst, m8_rsp)); in iselDblExpr_wrk()
2679 addInstr(env, AMD64Instr_SseSI2SF( 8, 8, src, dst )); in iselDblExpr_wrk()
2688 addInstr(env, AMD64Instr_SseSI2SF( 4, 8, src, dst )); in iselDblExpr_wrk()
2703 addInstr(env, mk_vMOVsd_RR(src,tmp)); in iselDblExpr_wrk()
2704 addInstr(env, AMD64Instr_Push(AMD64RMI_Imm(0))); in iselDblExpr_wrk()
2705 addInstr(env, AMD64Instr_Imm64( 1ULL<<63, r1 )); in iselDblExpr_wrk()
2706 addInstr(env, AMD64Instr_Push(AMD64RMI_Reg(r1))); in iselDblExpr_wrk()
2707 addInstr(env, AMD64Instr_SseLdSt(True, 16, dst, rsp0)); in iselDblExpr_wrk()
2710 addInstr(env, AMD64Instr_SseReRg(Asse_XOR, tmp, dst)); in iselDblExpr_wrk()
2712 addInstr(env, AMD64Instr_SseReRg(Asse_ANDN, tmp, dst)); in iselDblExpr_wrk()
2733 addInstr(env, AMD64Instr_SseLdSt(False/*store*/, 8, arg, m8_rsp)); in iselDblExpr_wrk()
2734 addInstr(env, AMD64Instr_A87Free(nNeeded)); in iselDblExpr_wrk()
2735 addInstr(env, AMD64Instr_A87PushPop(m8_rsp, True/*push*/, 8)); in iselDblExpr_wrk()
2738 addInstr(env, AMD64Instr_A87FpOp(fpop)); in iselDblExpr_wrk()
2741 addInstr(env, AMD64Instr_A87PushPop(m8_rsp, False/*pop*/, 8)); in iselDblExpr_wrk()
2743 addInstr(env, AMD64Instr_A87PushPop(m8_rsp, False/*pop*/, 8)); in iselDblExpr_wrk()
2744 addInstr(env, AMD64Instr_SseLdSt(True/*load*/, 8, dst, m8_rsp)); in iselDblExpr_wrk()
2770 addInstr(env, AMD64Instr_Alu64M(Aalu_MOV, src, m8_rsp)); in iselDblExpr_wrk()
2771 addInstr(env, AMD64Instr_SseLdSt(True/*load*/, 8, dst, m8_rsp)); in iselDblExpr_wrk()
2780 addInstr(env, AMD64Instr_SseSDSS(False/*S->D*/, f32, f64)); in iselDblExpr_wrk()
2797 addInstr(env, mk_vMOVsd_RR(rX,dst)); in iselDblExpr_wrk()
2798 addInstr(env, AMD64Instr_Test64(0xFF, r8)); in iselDblExpr_wrk()
2799 addInstr(env, AMD64Instr_SseCMov(Acc_Z,r0,dst)); in iselDblExpr_wrk()
2840 addInstr(env, AMD64Instr_SseLdSt( in iselVecExpr_wrk()
2853 addInstr(env, AMD64Instr_SseLdSt( True/*load*/, 16, dst, am )); in iselVecExpr_wrk()
2876 addInstr(env, AMD64Instr_SseLdSt( True/*load*/, 16, dst, rsp0 )); in iselVecExpr_wrk()
2911 addInstr(env, AMD64Instr_SseReRg(Asse_CMPEQ32, arg, tmp)); in iselVecExpr_wrk()
2913 addInstr(env, AMD64Instr_SseShuf(0xB1, tmp, dst)); in iselVecExpr_wrk()
2914 addInstr(env, AMD64Instr_SseReRg(Asse_OR, tmp, dst)); in iselVecExpr_wrk()
2927 addInstr(env, mk_vMOVsd_RR(arg, tmp)); in iselVecExpr_wrk()
2928 addInstr(env, AMD64Instr_SseReRg(op, zero, tmp)); in iselVecExpr_wrk()
2940 addInstr(env, AMD64Instr_Sse32Fx4(op, arg, dst)); in iselVecExpr_wrk()
2949 addInstr(env, AMD64Instr_Sse64Fx2(op, arg, dst)); in iselVecExpr_wrk()
2966 addInstr(env, mk_vMOVsd_RR(arg, dst)); in iselVecExpr_wrk()
2967 addInstr(env, AMD64Instr_Sse32FLo(op, arg, dst)); in iselVecExpr_wrk()
2982 addInstr(env, mk_vMOVsd_RR(arg, dst)); in iselVecExpr_wrk()
2983 addInstr(env, AMD64Instr_Sse64FLo(op, arg, dst)); in iselVecExpr_wrk()
2991 addInstr(env, AMD64Instr_Alu64M(Aalu_MOV, ri, rsp_m32)); in iselVecExpr_wrk()
2992 addInstr(env, AMD64Instr_SseLdzLO(4, dst, rsp_m32)); in iselVecExpr_wrk()
3000 addInstr(env, AMD64Instr_Push(rmi)); in iselVecExpr_wrk()
3001 addInstr(env, AMD64Instr_SseLdzLO(8, dst, rsp0)); in iselVecExpr_wrk()
3027 addInstr(env, AMD64Instr_SseLdSt(False/*store*/, 16, srcV, rsp_m16)); in iselVecExpr_wrk()
3028 addInstr(env, AMD64Instr_Alu64M(Aalu_MOV, AMD64RI_Reg(srcI), rsp_m16)); in iselVecExpr_wrk()
3029 addInstr(env, AMD64Instr_SseLdSt(True/*load*/, 16, dst, rsp_m16)); in iselVecExpr_wrk()
3039 addInstr(env, AMD64Instr_SseLdSt(False/*store*/, 16, srcV, rsp_m16)); in iselVecExpr_wrk()
3040 addInstr(env, AMD64Instr_Store(4, srcI, rsp_m16)); in iselVecExpr_wrk()
3041 addInstr(env, AMD64Instr_SseLdSt(True/*load*/, 16, dst, rsp_m16)); in iselVecExpr_wrk()
3051 addInstr(env, AMD64Instr_Alu64M(Aalu_MOV, qHi, m8_rsp)); in iselVecExpr_wrk()
3052 addInstr(env, AMD64Instr_Alu64M(Aalu_MOV, qLo, m16_rsp)); in iselVecExpr_wrk()
3055 addInstr(env, AMD64Instr_SseLdSt(True/*load*/, 16, dst, m16_rsp)); in iselVecExpr_wrk()
3074 addInstr(env, mk_vMOVsd_RR(argL, dst)); in iselVecExpr_wrk()
3075 addInstr(env, AMD64Instr_Sse32Fx4(op, argR, dst)); in iselVecExpr_wrk()
3094 addInstr(env, mk_vMOVsd_RR(argL, dst)); in iselVecExpr_wrk()
3095 addInstr(env, AMD64Instr_Sse64Fx2(op, argR, dst)); in iselVecExpr_wrk()
3113 addInstr(env, mk_vMOVsd_RR(argL, dst)); in iselVecExpr_wrk()
3114 addInstr(env, AMD64Instr_Sse32FLo(op, argR, dst)); in iselVecExpr_wrk()
3132 addInstr(env, mk_vMOVsd_RR(argL, dst)); in iselVecExpr_wrk()
3133 addInstr(env, AMD64Instr_Sse64FLo(op, argR, dst)); in iselVecExpr_wrk()
3201 addInstr(env, mk_vMOVsd_RR(arg2, dst)); in iselVecExpr_wrk()
3202 addInstr(env, AMD64Instr_SseReRg(op, arg1, dst)); in iselVecExpr_wrk()
3204 addInstr(env, mk_vMOVsd_RR(arg1, dst)); in iselVecExpr_wrk()
3205 addInstr(env, AMD64Instr_SseReRg(op, arg2, dst)); in iselVecExpr_wrk()
3224 addInstr(env, AMD64Instr_Push(AMD64RMI_Imm(0))); in iselVecExpr_wrk()
3225 addInstr(env, AMD64Instr_Push(rmi)); in iselVecExpr_wrk()
3226 addInstr(env, AMD64Instr_SseLdSt(True/*load*/, 16, ereg, rsp0)); in iselVecExpr_wrk()
3227 addInstr(env, mk_vMOVsd_RR(greg, dst)); in iselVecExpr_wrk()
3228 addInstr(env, AMD64Instr_SseReRg(op, ereg, dst)); in iselVecExpr_wrk()
3277 addInstr(env, AMD64Instr_Lea64(AMD64AMode_IR(48, hregAMD64_RSP()), in iselVecExpr_wrk()
3280 addInstr(env, AMD64Instr_Alu64R(Aalu_AND, in iselVecExpr_wrk()
3288 addInstr(env, AMD64Instr_Lea64(AMD64AMode_IR(0, argp), in iselVecExpr_wrk()
3290 addInstr(env, AMD64Instr_Lea64(AMD64AMode_IR(16, argp), in iselVecExpr_wrk()
3292 addInstr(env, AMD64Instr_Lea64(AMD64AMode_IR(32, argp), in iselVecExpr_wrk()
3298 addInstr(env, AMD64Instr_SseLdSt(False/*!isLoad*/, 16, argL, in iselVecExpr_wrk()
3300 addInstr(env, AMD64Instr_SseLdSt(False/*!isLoad*/, 16, argR, in iselVecExpr_wrk()
3303 addInstr(env, AMD64Instr_Call( Acc_ALWAYS, (ULong)fn, 3 )); in iselVecExpr_wrk()
3306 addInstr(env, AMD64Instr_SseLdSt(True/*isLoad*/, 16, dst, in iselVecExpr_wrk()
3328 addInstr(env, AMD64Instr_Lea64(AMD64AMode_IR(48, hregAMD64_RSP()), in iselVecExpr_wrk()
3331 addInstr(env, AMD64Instr_Alu64R(Aalu_AND, in iselVecExpr_wrk()
3338 addInstr(env, AMD64Instr_Lea64(AMD64AMode_IR(0, argp), in iselVecExpr_wrk()
3340 addInstr(env, AMD64Instr_Lea64(AMD64AMode_IR(16, argp), in iselVecExpr_wrk()
3345 addInstr(env, AMD64Instr_SseLdSt(False/*!isLoad*/, 16, argL, in iselVecExpr_wrk()
3348 addInstr(env, mk_iMOVsd_RR(argR, hregAMD64_RDX())); in iselVecExpr_wrk()
3351 addInstr(env, AMD64Instr_Call( Acc_ALWAYS, (ULong)fn, 3 )); in iselVecExpr_wrk()
3354 addInstr(env, AMD64Instr_SseLdSt(True/*isLoad*/, 16, dst, in iselVecExpr_wrk()
3371 addInstr(env, mk_vMOVsd_RR(rX,dst)); in iselVecExpr_wrk()
3372 addInstr(env, AMD64Instr_Test64(0xFF, r8)); in iselVecExpr_wrk()
3373 addInstr(env, AMD64Instr_SseCMov(Acc_Z,r0,dst)); in iselVecExpr_wrk()
3425 addInstr(env, AMD64Instr_SseLdSt(True/*load*/, 16, vLo, am0)); in iselDVecExpr_wrk()
3426 addInstr(env, AMD64Instr_SseLdSt(True/*load*/, 16, vHi, am16)); in iselDVecExpr_wrk()
3438 addInstr(env, AMD64Instr_SseLdSt(True/*load*/, 16, vLo, am0)); in iselDVecExpr_wrk()
3439 addInstr(env, AMD64Instr_SseLdSt(True/*load*/, 16, vHi, am16)); in iselDVecExpr_wrk()
3451 addInstr(env, mk_vMOVsd_RR(vHi, vLo)); in iselDVecExpr_wrk()
3481 addInstr(env, AMD64Instr_Sse32Fx4(op, argHi, dstHi)); in iselDVecExpr_wrk()
3482 addInstr(env, AMD64Instr_Sse32Fx4(op, argLo, dstLo)); in iselDVecExpr_wrk()
3495 addInstr(env, AMD64Instr_Sse64Fx2(op, argHi, dstHi)); in iselDVecExpr_wrk()
3496 addInstr(env, AMD64Instr_Sse64Fx2(op, argLo, dstLo)); in iselDVecExpr_wrk()
3511 addInstr(env, mk_vMOVsd_RR(tmpHi, tmpLo)); in iselDVecExpr_wrk()
3514 addInstr(env, AMD64Instr_SseReRg(Asse_CMPEQ32, argHi, tmpHi)); in iselDVecExpr_wrk()
3515 addInstr(env, AMD64Instr_SseReRg(Asse_CMPEQ32, argLo, tmpLo)); in iselDVecExpr_wrk()
3518 addInstr(env, AMD64Instr_SseShuf(0xB1, tmpHi, dstHi)); in iselDVecExpr_wrk()
3519 addInstr(env, AMD64Instr_SseShuf(0xB1, tmpLo, dstLo)); in iselDVecExpr_wrk()
3520 addInstr(env, AMD64Instr_SseReRg(Asse_OR, tmpHi, dstHi)); in iselDVecExpr_wrk()
3521 addInstr(env, AMD64Instr_SseReRg(Asse_OR, tmpLo, dstLo)); in iselDVecExpr_wrk()
3536 addInstr(env, mk_vMOVsd_RR(argHi, tmpHi)); in iselDVecExpr_wrk()
3537 addInstr(env, mk_vMOVsd_RR(argLo, tmpLo)); in iselDVecExpr_wrk()
3538 addInstr(env, AMD64Instr_SseReRg(op, zero, tmpHi)); in iselDVecExpr_wrk()
3539 addInstr(env, AMD64Instr_SseReRg(op, zero, tmpLo)); in iselDVecExpr_wrk()
3568 addInstr(env, mk_vMOVsd_RR(argLhi, dstHi)); in iselDVecExpr_wrk()
3569 addInstr(env, mk_vMOVsd_RR(argLlo, dstLo)); in iselDVecExpr_wrk()
3570 addInstr(env, AMD64Instr_Sse64Fx2(op, argRhi, dstHi)); in iselDVecExpr_wrk()
3571 addInstr(env, AMD64Instr_Sse64Fx2(op, argRlo, dstLo)); in iselDVecExpr_wrk()
3590 addInstr(env, mk_vMOVsd_RR(argLhi, dstHi)); in iselDVecExpr_wrk()
3591 addInstr(env, mk_vMOVsd_RR(argLlo, dstLo)); in iselDVecExpr_wrk()
3592 addInstr(env, AMD64Instr_Sse32Fx4(op, argRhi, dstHi)); in iselDVecExpr_wrk()
3593 addInstr(env, AMD64Instr_Sse32Fx4(op, argRlo, dstLo)); in iselDVecExpr_wrk()
3609 addInstr(env, mk_vMOVsd_RR(argLhi, dstHi)); in iselDVecExpr_wrk()
3610 addInstr(env, mk_vMOVsd_RR(argLlo, dstLo)); in iselDVecExpr_wrk()
3611 addInstr(env, AMD64Instr_SseReRg(op, argRhi, dstHi)); in iselDVecExpr_wrk()
3612 addInstr(env, AMD64Instr_SseReRg(op, argRlo, dstLo)); in iselDVecExpr_wrk()
3642 addInstr(env, AMD64Instr_Alu64M(Aalu_MOV, q3, m8_rsp)); in iselDVecExpr_wrk()
3643 addInstr(env, AMD64Instr_Alu64M(Aalu_MOV, q2, m16_rsp)); in iselDVecExpr_wrk()
3644 addInstr(env, AMD64Instr_SseLdSt(True/*load*/, 16, vHi, m16_rsp)); in iselDVecExpr_wrk()
3646 addInstr(env, AMD64Instr_Alu64M(Aalu_MOV, q1, m8_rsp)); in iselDVecExpr_wrk()
3647 addInstr(env, AMD64Instr_Alu64M(Aalu_MOV, q0, m16_rsp)); in iselDVecExpr_wrk()
3648 addInstr(env, AMD64Instr_SseLdSt(True/*load*/, 16, vLo, m16_rsp)); in iselDVecExpr_wrk()
3688 addInstr(env, AMD64Instr_Alu64M(Aalu_MOV,ri,am)); in iselStmt()
3694 addInstr(env, AMD64Instr_Store( in iselStmt()
3702 addInstr(env, AMD64Instr_SseLdSt(False/*store*/, 8, r, am)); in iselStmt()
3708 addInstr(env, AMD64Instr_SseLdSt(False/*store*/, 4, r, am)); in iselStmt()
3714 addInstr(env, AMD64Instr_SseLdSt(False/*store*/, 16, r, am)); in iselStmt()
3723 addInstr(env, AMD64Instr_SseLdSt(False/*store*/, 16, vLo, am0)); in iselStmt()
3724 addInstr(env, AMD64Instr_SseLdSt(False/*store*/, 16, vHi, am16)); in iselStmt()
3737 addInstr(env, in iselStmt()
3748 addInstr(env, AMD64Instr_Store( in iselStmt()
3759 addInstr(env, AMD64Instr_SseLdSt( False/*store*/, 4, f32, am )); in iselStmt()
3766 addInstr(env, AMD64Instr_SseLdSt( False/*store*/, 8, f64, am )); in iselStmt()
3773 addInstr(env, AMD64Instr_SseLdSt(False/*store*/, 16, vec, am)); in iselStmt()
3782 addInstr(env, AMD64Instr_SseLdSt(False/*store*/, 16, vLo, am0)); in iselStmt()
3783 addInstr(env, AMD64Instr_SseLdSt(False/*store*/, 16, vHi, am16)); in iselStmt()
3801 addInstr(env, AMD64Instr_SseLdSt( False/*store*/, 8, val, am )); in iselStmt()
3806 addInstr(env, AMD64Instr_Store( 1, r, am )); in iselStmt()
3811 addInstr(env, AMD64Instr_Alu64M( Aalu_MOV, ri, am )); in iselStmt()
3838 addInstr(env, AMD64Instr_Alu64R(Aalu_MOV, AMD64RMI_Reg(src), dst)); in iselStmt()
3840 addInstr(env, AMD64Instr_Lea64(am,dst)); in iselStmt()
3849 addInstr(env, AMD64Instr_Alu64R(Aalu_MOV,rmi,dst)); in iselStmt()
3856 addInstr(env, mk_iMOVsd_RR(rHi,dstHi) ); in iselStmt()
3857 addInstr(env, mk_iMOVsd_RR(rLo,dstLo) ); in iselStmt()
3863 addInstr(env, AMD64Instr_Set64(cond, dst)); in iselStmt()
3869 addInstr(env, mk_vMOVsd_RR(src, dst)); in iselStmt()
3875 addInstr(env, mk_vMOVsd_RR(src, dst)); in iselStmt()
3881 addInstr(env, mk_vMOVsd_RR(src, dst)); in iselStmt()
3888 addInstr(env, mk_vMOVsd_RR(rHi,dstHi) ); in iselStmt()
3889 addInstr(env, mk_vMOVsd_RR(rLo,dstLo) ); in iselStmt()
3920 addInstr(env, mk_iMOVsd_RR(hregAMD64_RAX(),dst) ); in iselStmt()
3930 addInstr(env, AMD64Instr_MFence()); in iselStmt()
3951 addInstr(env, mk_iMOVsd_RR(rExpd, rOld)); in iselStmt()
3952 addInstr(env, mk_iMOVsd_RR(rExpd, hregAMD64_RAX())); in iselStmt()
3953 addInstr(env, mk_iMOVsd_RR(rData, hregAMD64_RBX())); in iselStmt()
3961 addInstr(env, AMD64Instr_ACAS(am, sz)); in iselStmt()
3962 addInstr(env, AMD64Instr_CMov64( in iselStmt()
3994 addInstr(env, mk_iMOVsd_RR(rExpdHi, rOldHi)); in iselStmt()
3995 addInstr(env, mk_iMOVsd_RR(rExpdLo, rOldLo)); in iselStmt()
3996 addInstr(env, mk_iMOVsd_RR(rExpdHi, hregAMD64_RDX())); in iselStmt()
3997 addInstr(env, mk_iMOVsd_RR(rExpdLo, hregAMD64_RAX())); in iselStmt()
3998 addInstr(env, mk_iMOVsd_RR(rDataHi, hregAMD64_RCX())); in iselStmt()
3999 addInstr(env, mk_iMOVsd_RR(rDataLo, hregAMD64_RBX())); in iselStmt()
4000 addInstr(env, AMD64Instr_DACAS(am, sz)); in iselStmt()
4001 addInstr(env, in iselStmt()
4004 addInstr(env, in iselStmt()
4045 addInstr(env, AMD64Instr_XDirect(stmt->Ist.Exit.dst->Ico.U64, in iselStmt()
4052 addInstr(env, AMD64Instr_XAssisted(r, amRIP, cc, Ijk_Boring)); in iselStmt()
4071 addInstr(env, AMD64Instr_XAssisted(r, amRIP, cc, stmt->Ist.Exit.jk)); in iselStmt()
4119 addInstr(env, AMD64Instr_XDirect(cdst->Ico.U64, in iselNext()
4128 addInstr(env, AMD64Instr_XAssisted(r, amRIP, Acc_ALWAYS, in iselNext()
4141 addInstr(env, AMD64Instr_XIndir(r, amRIP, Acc_ALWAYS)); in iselNext()
4143 addInstr(env, AMD64Instr_XAssisted(r, amRIP, Acc_ALWAYS, in iselNext()
4166 addInstr(env, AMD64Instr_XAssisted(r, amRIP, Acc_ALWAYS, jk)); in iselNext()
4268 addInstr(env, AMD64Instr_EvCheck(amCounter, amFailAddr)); in iselSB_AMD64()
4275 addInstr(env, AMD64Instr_ProfInc()); in iselSB_AMD64()