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1 // Copyright 2006-2013 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are
4 // met:
5 //
6 //     * Redistributions of source code must retain the above copyright
7 //       notice, this list of conditions and the following disclaimer.
8 //     * Redistributions in binary form must reproduce the above
9 //       copyright notice, this list of conditions and the following
10 //       disclaimer in the documentation and/or other materials provided
11 //       with the distribution.
12 //     * Neither the name of Google Inc. nor the names of its
13 //       contributors may be used to endorse or promote products derived
14 //       from this software without specific prior written permission.
15 //
16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 
28 // This module contains the architecture-specific code. This make the rest of
29 // the code less dependent on differences between different processor
30 // architecture.
31 // The classes have the same definition for all architectures. The
32 // implementation for a particular architecture is put in cpu_<arch>.cc.
33 // The build system then uses the implementation for the target architecture.
34 //
35 
36 #ifndef V8_CPU_H_
37 #define V8_CPU_H_
38 
39 #include "allocation.h"
40 
41 namespace v8 {
42 namespace internal {
43 
44 // ----------------------------------------------------------------------------
45 // CPU
46 //
47 // Query information about the processor.
48 //
49 // This class also has static methods for the architecture specific functions.
50 // Add methods here to cope with differences between the supported
51 // architectures. For each architecture the file cpu_<arch>.cc contains the
52 // implementation of these static functions.
53 
54 class CPU V8_FINAL BASE_EMBEDDED {
55  public:
56   CPU();
57 
58   // x86 CPUID information
vendor()59   const char* vendor() const { return vendor_; }
stepping()60   int stepping() const { return stepping_; }
model()61   int model() const { return model_; }
ext_model()62   int ext_model() const { return ext_model_; }
family()63   int family() const { return family_; }
ext_family()64   int ext_family() const { return ext_family_; }
type()65   int type() const { return type_; }
66 
67   // arm implementer/part information
implementer()68   int implementer() const { return implementer_; }
69   static const int ARM = 0x41;
70   static const int QUALCOMM = 0x51;
architecture()71   int architecture() const { return architecture_; }
part()72   int part() const { return part_; }
73   static const int ARM_CORTEX_A5 = 0xc05;
74   static const int ARM_CORTEX_A7 = 0xc07;
75   static const int ARM_CORTEX_A8 = 0xc08;
76   static const int ARM_CORTEX_A9 = 0xc09;
77   static const int ARM_CORTEX_A12 = 0xc0c;
78   static const int ARM_CORTEX_A15 = 0xc0f;
79 
80   // General features
has_fpu()81   bool has_fpu() const { return has_fpu_; }
82 
83   // x86 features
has_cmov()84   bool has_cmov() const { return has_cmov_; }
has_sahf()85   bool has_sahf() const { return has_sahf_; }
has_mmx()86   bool has_mmx() const { return has_mmx_; }
has_sse()87   bool has_sse() const { return has_sse_; }
has_sse2()88   bool has_sse2() const { return has_sse2_; }
has_sse3()89   bool has_sse3() const { return has_sse3_; }
has_ssse3()90   bool has_ssse3() const { return has_ssse3_; }
has_sse41()91   bool has_sse41() const { return has_sse41_; }
has_sse42()92   bool has_sse42() const { return has_sse42_; }
93 
94   // arm features
has_idiva()95   bool has_idiva() const { return has_idiva_; }
has_neon()96   bool has_neon() const { return has_neon_; }
has_thumbee()97   bool has_thumbee() const { return has_thumbee_; }
has_vfp()98   bool has_vfp() const { return has_vfp_; }
has_vfp3()99   bool has_vfp3() const { return has_vfp3_; }
has_vfp3_d32()100   bool has_vfp3_d32() const { return has_vfp3_d32_; }
101 
102   // Returns the number of processors online.
103   static int NumberOfProcessorsOnline();
104 
105   // Initializes the cpu architecture support. Called once at VM startup.
106   static void SetUp();
107 
108   static bool SupportsCrankshaft();
109 
110   // Flush instruction cache.
111   static void FlushICache(void* start, size_t size);
112 
113  private:
114   char vendor_[13];
115   int stepping_;
116   int model_;
117   int ext_model_;
118   int family_;
119   int ext_family_;
120   int type_;
121   int implementer_;
122   int architecture_;
123   int part_;
124   bool has_fpu_;
125   bool has_cmov_;
126   bool has_sahf_;
127   bool has_mmx_;
128   bool has_sse_;
129   bool has_sse2_;
130   bool has_sse3_;
131   bool has_ssse3_;
132   bool has_sse41_;
133   bool has_sse42_;
134   bool has_idiva_;
135   bool has_neon_;
136   bool has_thumbee_;
137   bool has_vfp_;
138   bool has_vfp3_;
139   bool has_vfp3_d32_;
140 };
141 
142 } }  // namespace v8::internal
143 
144 #endif  // V8_CPU_H_
145