/external/llvm/lib/Target/Mips/ |
D | MipsInstrInfo.h | 87 unsigned SrcReg, bool isKill, int FrameIndex, in storeRegToStackSlot()
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D | Mips16InstrInfo.cpp | 102 unsigned SrcReg, bool isKill, int FI, in storeRegToStack()
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D | MipsSEInstrInfo.cpp | 179 unsigned SrcReg, bool isKill, int FI, in storeRegToStack()
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/external/llvm/lib/Target/ARM/ |
D | Thumb1InstrInfo.cpp | 53 unsigned SrcReg, bool isKill, int FI, in storeRegToStackSlot()
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D | Thumb1FrameLowering.cpp | 348 bool isKill = true; in spillCalleeSavedRegisters() local
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D | Thumb2InstrInfo.cpp | 127 unsigned SrcReg, bool isKill, int FI, in storeRegToStackSlot()
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D | ARMLoadStoreOptimizer.cpp | 82 bool isKill; member 399 bool isKill = memOps[i].isKill || KilledRegs.count(Reg); in MergeOpsUpdate() local 1246 bool isKill = MO.isDef() ? false : MO.isKill(); in LoadStoreMultipleOpti() local
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D | Thumb1RegisterInfo.cpp | 268 bool isKill = BaseReg != ARM::SP; in emitThumbRegPlusImmediate() local
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/external/llvm/lib/Target/XCore/ |
D | XCoreRegisterInfo.cpp | 154 bool isKill = MI.getOpcode() == XCore::STWFI && MI.getOperand(0).isKill(); in eliminateFrameIndex() local
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D | XCoreInstrInfo.cpp | 363 unsigned SrcReg, bool isKill, in storeRegToStackSlot()
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/external/llvm/lib/Target/X86/ |
D | X86InstrBuilder.h | 108 unsigned Reg, bool isKill, int Offset) { in addRegOffset()
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D | X86InstrInfo.cpp | 1768 unsigned &NewSrc, bool &isKill, bool &isUndef, in classifyLEAReg() 1850 bool isKill = MI->getOperand(1).isKill(); in convertToThreeAddressWithLEA() local 2037 bool isKill, isUndef; in convertToThreeAddress() local 2077 bool isKill, isUndef; in convertToThreeAddress() local 2108 bool isKill, isUndef; in convertToThreeAddress() local 2144 bool isKill, isUndef; in convertToThreeAddress() local 2213 bool isKill, isUndef; in convertToThreeAddress() local 3087 unsigned SrcReg, bool isKill, int FrameIdx, in storeRegToStackSlot() 3103 bool isKill, in storeRegToAddr()
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/external/llvm/lib/Target/MSP430/ |
D | MSP430InstrInfo.cpp | 36 unsigned SrcReg, bool isKill, int FrameIdx, in storeRegToStackSlot()
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/external/llvm/lib/Target/Sparc/ |
D | SparcInstrInfo.cpp | 309 unsigned SrcReg, bool isKill, int FI, in storeRegToStackSlot()
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/external/llvm/lib/CodeGen/ |
D | MachineInstrBundle.cpp | 198 bool isKill = KilledUseSet.count(Reg); in finalizeBundle() local
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D | TwoAddressInstructionPass.cpp | 862 bool isKill = MO.isKill() || in rescheduleMIBelowKill() local 996 bool isKill = MO.isKill() || (LIS && isPlainlyKilled(KillMI, MOReg, LIS)); in rescheduleKillAboveMI() local 1634 bool isKill = UseMO.isKill(); in eliminateRegSequence() local
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D | MachineInstr.cpp | 130 bool isKill, bool isDead, bool isUndef, in ChangeToRegister() 997 int MachineInstr::findRegisterUseOperandIdx(unsigned Reg, bool isKill, in findRegisterUseOperandIdx()
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
D | AMDGPUInstrInfo.cpp | 124 unsigned SrcReg, bool isKill, in storeRegToStackSlot()
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/external/mesa3d/src/gallium/drivers/radeon/ |
D | AMDGPUInstrInfo.cpp | 124 unsigned SrcReg, bool isKill, in storeRegToStackSlot()
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/external/llvm/lib/Target/R600/ |
D | AMDGPUInstrInfo.cpp | 105 unsigned SrcReg, bool isKill, in storeRegToStackSlot()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonInstrInfo.cpp | 469 unsigned SrcReg, bool isKill, int FI, in storeRegToStackSlot() 505 bool isKill, in storeRegToAddr()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrInfo.cpp | 561 unsigned SrcReg, bool isKill, in StoreRegToStackSlot() 654 unsigned SrcReg, bool isKill, int FrameIdx, in storeRegToStackSlot()
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/external/llvm/include/llvm/CodeGen/ |
D | MachineOperand.h | 289 bool isKill() const { in isKill() function
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.cpp | 370 unsigned SrcReg, bool isKill, in storeRegToStackSlot()
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZInstrInfo.cpp | 388 unsigned SrcReg, bool isKill, in storeRegToStackSlot()
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