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1 //===-- MipsMCTargetDesc.h - Mips Target Descriptions -----------*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides Mips specific target descriptions.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef MIPSMCTARGETDESC_H
15 #define MIPSMCTARGETDESC_H
16 
17 #include "llvm/Support/DataTypes.h"
18 
19 namespace llvm {
20 class MCAsmBackend;
21 class MCCodeEmitter;
22 class MCContext;
23 class MCInstrInfo;
24 class MCObjectWriter;
25 class MCRegisterInfo;
26 class MCSubtargetInfo;
27 class StringRef;
28 class Target;
29 class raw_ostream;
30 
31 extern Target TheMipsTarget;
32 extern Target TheMipselTarget;
33 extern Target TheMips64Target;
34 extern Target TheMips64elTarget;
35 
36 MCCodeEmitter *createMipsMCCodeEmitterEB(const MCInstrInfo &MCII,
37                                          const MCRegisterInfo &MRI,
38                                          const MCSubtargetInfo &STI,
39                                          MCContext &Ctx);
40 MCCodeEmitter *createMipsMCCodeEmitterEL(const MCInstrInfo &MCII,
41                                          const MCRegisterInfo &MRI,
42                                          const MCSubtargetInfo &STI,
43                                          MCContext &Ctx);
44 
45 MCAsmBackend *createMipsAsmBackendEB32(const Target &T, StringRef TT,
46                                        StringRef CPU);
47 MCAsmBackend *createMipsAsmBackendEL32(const Target &T, StringRef TT,
48                                        StringRef CPU);
49 MCAsmBackend *createMipsAsmBackendEB64(const Target &T, StringRef TT,
50                                        StringRef CPU);
51 MCAsmBackend *createMipsAsmBackendEL64(const Target &T, StringRef TT,
52                                        StringRef CPU);
53 
54 MCObjectWriter *createMipsELFObjectWriter(raw_ostream &OS,
55                                           uint8_t OSABI,
56                                           bool IsLittleEndian,
57                                           bool Is64Bit);
58 } // End llvm namespace
59 
60 // Defines symbolic names for Mips registers.  This defines a mapping from
61 // register name to register number.
62 #define GET_REGINFO_ENUM
63 #include "MipsGenRegisterInfo.inc"
64 
65 // Defines symbolic names for the Mips instructions.
66 #define GET_INSTRINFO_ENUM
67 #include "MipsGenInstrInfo.inc"
68 
69 #define GET_SUBTARGETINFO_ENUM
70 #include "MipsGenSubtargetInfo.inc"
71 
72 #endif
73