1 //===-- CodeGen/MachineInstBuilder.h - Simplify creation of MIs -*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file exposes a function named BuildMI, which is useful for dramatically
11 // simplifying how MachineInstr's are created. It allows use of code like this:
12 //
13 // M = BuildMI(X86::ADDrr8, 2).addReg(argVal1).addReg(argVal2);
14 //
15 //===----------------------------------------------------------------------===//
16
17 #ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
18 #define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
19
20 #include "llvm/CodeGen/MachineFunction.h"
21 #include "llvm/CodeGen/MachineInstrBundle.h"
22 #include "llvm/Support/ErrorHandling.h"
23
24 namespace llvm {
25
26 class MCInstrDesc;
27 class MDNode;
28
29 namespace RegState {
30 enum {
31 Define = 0x2,
32 Implicit = 0x4,
33 Kill = 0x8,
34 Dead = 0x10,
35 Undef = 0x20,
36 EarlyClobber = 0x40,
37 Debug = 0x80,
38 InternalRead = 0x100,
39 DefineNoRead = Define | Undef,
40 ImplicitDefine = Implicit | Define,
41 ImplicitKill = Implicit | Kill
42 };
43 }
44
45 class MachineInstrBuilder {
46 MachineFunction *MF;
47 MachineInstr *MI;
48 public:
MachineInstrBuilder()49 MachineInstrBuilder() : MF(0), MI(0) {}
50
51 /// Create a MachineInstrBuilder for manipulating an existing instruction.
52 /// F must be the machine function that was used to allocate I.
MachineInstrBuilder(MachineFunction & F,MachineInstr * I)53 MachineInstrBuilder(MachineFunction &F, MachineInstr *I) : MF(&F), MI(I) {}
54
55 /// Allow automatic conversion to the machine instruction we are working on.
56 ///
57 operator MachineInstr*() const { return MI; }
58 MachineInstr *operator->() const { return MI; }
iterator()59 operator MachineBasicBlock::iterator() const { return MI; }
60
61 /// addReg - Add a new virtual register operand...
62 ///
63 const
64 MachineInstrBuilder &addReg(unsigned RegNo, unsigned flags = 0,
65 unsigned SubReg = 0) const {
66 assert((flags & 0x1) == 0 &&
67 "Passing in 'true' to addReg is forbidden! Use enums instead.");
68 MI->addOperand(*MF, MachineOperand::CreateReg(RegNo,
69 flags & RegState::Define,
70 flags & RegState::Implicit,
71 flags & RegState::Kill,
72 flags & RegState::Dead,
73 flags & RegState::Undef,
74 flags & RegState::EarlyClobber,
75 SubReg,
76 flags & RegState::Debug,
77 flags & RegState::InternalRead));
78 return *this;
79 }
80
81 /// addImm - Add a new immediate operand.
82 ///
addImm(int64_t Val)83 const MachineInstrBuilder &addImm(int64_t Val) const {
84 MI->addOperand(*MF, MachineOperand::CreateImm(Val));
85 return *this;
86 }
87
addCImm(const ConstantInt * Val)88 const MachineInstrBuilder &addCImm(const ConstantInt *Val) const {
89 MI->addOperand(*MF, MachineOperand::CreateCImm(Val));
90 return *this;
91 }
92
addFPImm(const ConstantFP * Val)93 const MachineInstrBuilder &addFPImm(const ConstantFP *Val) const {
94 MI->addOperand(*MF, MachineOperand::CreateFPImm(Val));
95 return *this;
96 }
97
98 const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB,
99 unsigned char TargetFlags = 0) const {
100 MI->addOperand(*MF, MachineOperand::CreateMBB(MBB, TargetFlags));
101 return *this;
102 }
103
addFrameIndex(int Idx)104 const MachineInstrBuilder &addFrameIndex(int Idx) const {
105 MI->addOperand(*MF, MachineOperand::CreateFI(Idx));
106 return *this;
107 }
108
109 const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx,
110 int Offset = 0,
111 unsigned char TargetFlags = 0) const {
112 MI->addOperand(*MF, MachineOperand::CreateCPI(Idx, Offset, TargetFlags));
113 return *this;
114 }
115
116 const MachineInstrBuilder &addTargetIndex(unsigned Idx, int64_t Offset = 0,
117 unsigned char TargetFlags = 0) const {
118 MI->addOperand(*MF, MachineOperand::CreateTargetIndex(Idx, Offset,
119 TargetFlags));
120 return *this;
121 }
122
123 const MachineInstrBuilder &addJumpTableIndex(unsigned Idx,
124 unsigned char TargetFlags = 0) const {
125 MI->addOperand(*MF, MachineOperand::CreateJTI(Idx, TargetFlags));
126 return *this;
127 }
128
129 const MachineInstrBuilder &addGlobalAddress(const GlobalValue *GV,
130 int64_t Offset = 0,
131 unsigned char TargetFlags = 0) const {
132 MI->addOperand(*MF, MachineOperand::CreateGA(GV, Offset, TargetFlags));
133 return *this;
134 }
135
136 const MachineInstrBuilder &addExternalSymbol(const char *FnName,
137 unsigned char TargetFlags = 0) const {
138 MI->addOperand(*MF, MachineOperand::CreateES(FnName, TargetFlags));
139 return *this;
140 }
141
142 const MachineInstrBuilder &addBlockAddress(const BlockAddress *BA,
143 int64_t Offset = 0,
144 unsigned char TargetFlags = 0) const {
145 MI->addOperand(*MF, MachineOperand::CreateBA(BA, Offset, TargetFlags));
146 return *this;
147 }
148
addRegMask(const uint32_t * Mask)149 const MachineInstrBuilder &addRegMask(const uint32_t *Mask) const {
150 MI->addOperand(*MF, MachineOperand::CreateRegMask(Mask));
151 return *this;
152 }
153
addMemOperand(MachineMemOperand * MMO)154 const MachineInstrBuilder &addMemOperand(MachineMemOperand *MMO) const {
155 MI->addMemOperand(*MF, MMO);
156 return *this;
157 }
158
setMemRefs(MachineInstr::mmo_iterator b,MachineInstr::mmo_iterator e)159 const MachineInstrBuilder &setMemRefs(MachineInstr::mmo_iterator b,
160 MachineInstr::mmo_iterator e) const {
161 MI->setMemRefs(b, e);
162 return *this;
163 }
164
165
addOperand(const MachineOperand & MO)166 const MachineInstrBuilder &addOperand(const MachineOperand &MO) const {
167 MI->addOperand(*MF, MO);
168 return *this;
169 }
170
addMetadata(const MDNode * MD)171 const MachineInstrBuilder &addMetadata(const MDNode *MD) const {
172 MI->addOperand(*MF, MachineOperand::CreateMetadata(MD));
173 return *this;
174 }
175
addSym(MCSymbol * Sym)176 const MachineInstrBuilder &addSym(MCSymbol *Sym) const {
177 MI->addOperand(*MF, MachineOperand::CreateMCSymbol(Sym));
178 return *this;
179 }
180
setMIFlags(unsigned Flags)181 const MachineInstrBuilder &setMIFlags(unsigned Flags) const {
182 MI->setFlags(Flags);
183 return *this;
184 }
185
setMIFlag(MachineInstr::MIFlag Flag)186 const MachineInstrBuilder &setMIFlag(MachineInstr::MIFlag Flag) const {
187 MI->setFlag(Flag);
188 return *this;
189 }
190
191 // Add a displacement from an existing MachineOperand with an added offset.
192 const MachineInstrBuilder &addDisp(const MachineOperand &Disp, int64_t off,
193 unsigned char TargetFlags = 0) const {
194 switch (Disp.getType()) {
195 default:
196 llvm_unreachable("Unhandled operand type in addDisp()");
197 case MachineOperand::MO_Immediate:
198 return addImm(Disp.getImm() + off);
199 case MachineOperand::MO_GlobalAddress: {
200 // If caller specifies new TargetFlags then use it, otherwise the
201 // default behavior is to copy the target flags from the existing
202 // MachineOperand. This means if the caller wants to clear the
203 // target flags it needs to do so explicitly.
204 if (TargetFlags)
205 return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off,
206 TargetFlags);
207 return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off,
208 Disp.getTargetFlags());
209 }
210 }
211 }
212
213 /// Copy all the implicit operands from OtherMI onto this one.
copyImplicitOps(const MachineInstr * OtherMI)214 const MachineInstrBuilder ©ImplicitOps(const MachineInstr *OtherMI) {
215 MI->copyImplicitOps(*MF, OtherMI);
216 return *this;
217 }
218 };
219
220 /// BuildMI - Builder interface. Specify how to create the initial instruction
221 /// itself.
222 ///
BuildMI(MachineFunction & MF,DebugLoc DL,const MCInstrDesc & MCID)223 inline MachineInstrBuilder BuildMI(MachineFunction &MF,
224 DebugLoc DL,
225 const MCInstrDesc &MCID) {
226 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL));
227 }
228
229 /// BuildMI - This version of the builder sets up the first operand as a
230 /// destination virtual register.
231 ///
BuildMI(MachineFunction & MF,DebugLoc DL,const MCInstrDesc & MCID,unsigned DestReg)232 inline MachineInstrBuilder BuildMI(MachineFunction &MF,
233 DebugLoc DL,
234 const MCInstrDesc &MCID,
235 unsigned DestReg) {
236 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL))
237 .addReg(DestReg, RegState::Define);
238 }
239
240 /// BuildMI - This version of the builder inserts the newly-built
241 /// instruction before the given position in the given MachineBasicBlock, and
242 /// sets up the first operand as a destination virtual register.
243 ///
BuildMI(MachineBasicBlock & BB,MachineBasicBlock::iterator I,DebugLoc DL,const MCInstrDesc & MCID,unsigned DestReg)244 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
245 MachineBasicBlock::iterator I,
246 DebugLoc DL,
247 const MCInstrDesc &MCID,
248 unsigned DestReg) {
249 MachineFunction &MF = *BB.getParent();
250 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
251 BB.insert(I, MI);
252 return MachineInstrBuilder(MF, MI).addReg(DestReg, RegState::Define);
253 }
254
BuildMI(MachineBasicBlock & BB,MachineBasicBlock::instr_iterator I,DebugLoc DL,const MCInstrDesc & MCID,unsigned DestReg)255 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
256 MachineBasicBlock::instr_iterator I,
257 DebugLoc DL,
258 const MCInstrDesc &MCID,
259 unsigned DestReg) {
260 MachineFunction &MF = *BB.getParent();
261 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
262 BB.insert(I, MI);
263 return MachineInstrBuilder(MF, MI).addReg(DestReg, RegState::Define);
264 }
265
BuildMI(MachineBasicBlock & BB,MachineInstr * I,DebugLoc DL,const MCInstrDesc & MCID,unsigned DestReg)266 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
267 MachineInstr *I,
268 DebugLoc DL,
269 const MCInstrDesc &MCID,
270 unsigned DestReg) {
271 if (I->isInsideBundle()) {
272 MachineBasicBlock::instr_iterator MII = I;
273 return BuildMI(BB, MII, DL, MCID, DestReg);
274 }
275
276 MachineBasicBlock::iterator MII = I;
277 return BuildMI(BB, MII, DL, MCID, DestReg);
278 }
279
280 /// BuildMI - This version of the builder inserts the newly-built
281 /// instruction before the given position in the given MachineBasicBlock, and
282 /// does NOT take a destination register.
283 ///
BuildMI(MachineBasicBlock & BB,MachineBasicBlock::iterator I,DebugLoc DL,const MCInstrDesc & MCID)284 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
285 MachineBasicBlock::iterator I,
286 DebugLoc DL,
287 const MCInstrDesc &MCID) {
288 MachineFunction &MF = *BB.getParent();
289 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
290 BB.insert(I, MI);
291 return MachineInstrBuilder(MF, MI);
292 }
293
BuildMI(MachineBasicBlock & BB,MachineBasicBlock::instr_iterator I,DebugLoc DL,const MCInstrDesc & MCID)294 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
295 MachineBasicBlock::instr_iterator I,
296 DebugLoc DL,
297 const MCInstrDesc &MCID) {
298 MachineFunction &MF = *BB.getParent();
299 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
300 BB.insert(I, MI);
301 return MachineInstrBuilder(MF, MI);
302 }
303
BuildMI(MachineBasicBlock & BB,MachineInstr * I,DebugLoc DL,const MCInstrDesc & MCID)304 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
305 MachineInstr *I,
306 DebugLoc DL,
307 const MCInstrDesc &MCID) {
308 if (I->isInsideBundle()) {
309 MachineBasicBlock::instr_iterator MII = I;
310 return BuildMI(BB, MII, DL, MCID);
311 }
312
313 MachineBasicBlock::iterator MII = I;
314 return BuildMI(BB, MII, DL, MCID);
315 }
316
317 /// BuildMI - This version of the builder inserts the newly-built
318 /// instruction at the end of the given MachineBasicBlock, and does NOT take a
319 /// destination register.
320 ///
BuildMI(MachineBasicBlock * BB,DebugLoc DL,const MCInstrDesc & MCID)321 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
322 DebugLoc DL,
323 const MCInstrDesc &MCID) {
324 return BuildMI(*BB, BB->end(), DL, MCID);
325 }
326
327 /// BuildMI - This version of the builder inserts the newly-built
328 /// instruction at the end of the given MachineBasicBlock, and sets up the first
329 /// operand as a destination virtual register.
330 ///
BuildMI(MachineBasicBlock * BB,DebugLoc DL,const MCInstrDesc & MCID,unsigned DestReg)331 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
332 DebugLoc DL,
333 const MCInstrDesc &MCID,
334 unsigned DestReg) {
335 return BuildMI(*BB, BB->end(), DL, MCID, DestReg);
336 }
337
338 /// BuildMI - This version of the builder builds a DBG_VALUE intrinsic
339 /// for either a value in a register or a register-indirect+offset
340 /// address. The convention is that a DBG_VALUE is indirect iff the
341 /// second operand is an immediate.
342 ///
BuildMI(MachineFunction & MF,DebugLoc DL,const MCInstrDesc & MCID,bool IsIndirect,unsigned Reg,unsigned Offset,const MDNode * MD)343 inline MachineInstrBuilder BuildMI(MachineFunction &MF,
344 DebugLoc DL,
345 const MCInstrDesc &MCID,
346 bool IsIndirect,
347 unsigned Reg,
348 unsigned Offset,
349 const MDNode *MD) {
350 if (IsIndirect)
351 return BuildMI(MF, DL, MCID)
352 .addReg(Reg, RegState::Debug)
353 .addImm(Offset)
354 .addMetadata(MD);
355 else {
356 assert(Offset == 0 && "A direct address cannot have an offset.");
357 return BuildMI(MF, DL, MCID)
358 .addReg(Reg, RegState::Debug)
359 .addReg(0U, RegState::Debug)
360 .addMetadata(MD);
361 }
362 }
363
364 /// BuildMI - This version of the builder builds a DBG_VALUE intrinsic
365 /// for either a value in a register or a register-indirect+offset
366 /// address and inserts it at position I.
367 ///
BuildMI(MachineBasicBlock & BB,MachineBasicBlock::iterator I,DebugLoc DL,const MCInstrDesc & MCID,bool IsIndirect,unsigned Reg,unsigned Offset,const MDNode * MD)368 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
369 MachineBasicBlock::iterator I,
370 DebugLoc DL,
371 const MCInstrDesc &MCID,
372 bool IsIndirect,
373 unsigned Reg,
374 unsigned Offset,
375 const MDNode *MD) {
376 MachineFunction &MF = *BB.getParent();
377 MachineInstr *MI = BuildMI(MF, DL, MCID, IsIndirect, Reg, Offset, MD);
378 BB.insert(I, MI);
379 return MachineInstrBuilder(MF, MI);
380 }
381
382
getDefRegState(bool B)383 inline unsigned getDefRegState(bool B) {
384 return B ? RegState::Define : 0;
385 }
getImplRegState(bool B)386 inline unsigned getImplRegState(bool B) {
387 return B ? RegState::Implicit : 0;
388 }
getKillRegState(bool B)389 inline unsigned getKillRegState(bool B) {
390 return B ? RegState::Kill : 0;
391 }
getDeadRegState(bool B)392 inline unsigned getDeadRegState(bool B) {
393 return B ? RegState::Dead : 0;
394 }
getUndefRegState(bool B)395 inline unsigned getUndefRegState(bool B) {
396 return B ? RegState::Undef : 0;
397 }
getInternalReadRegState(bool B)398 inline unsigned getInternalReadRegState(bool B) {
399 return B ? RegState::InternalRead : 0;
400 }
getDebugRegState(bool B)401 inline unsigned getDebugRegState(bool B) {
402 return B ? RegState::Debug : 0;
403 }
404
405
406 /// Helper class for constructing bundles of MachineInstrs.
407 ///
408 /// MIBundleBuilder can create a bundle from scratch by inserting new
409 /// MachineInstrs one at a time, or it can create a bundle from a sequence of
410 /// existing MachineInstrs in a basic block.
411 class MIBundleBuilder {
412 MachineBasicBlock &MBB;
413 MachineBasicBlock::instr_iterator Begin;
414 MachineBasicBlock::instr_iterator End;
415
416 public:
417 /// Create an MIBundleBuilder that inserts instructions into a new bundle in
418 /// BB above the bundle or instruction at Pos.
MIBundleBuilder(MachineBasicBlock & BB,MachineBasicBlock::iterator Pos)419 MIBundleBuilder(MachineBasicBlock &BB,
420 MachineBasicBlock::iterator Pos)
421 : MBB(BB), Begin(Pos.getInstrIterator()), End(Begin) {}
422
423 /// Create a bundle from the sequence of instructions between B and E.
MIBundleBuilder(MachineBasicBlock & BB,MachineBasicBlock::iterator B,MachineBasicBlock::iterator E)424 MIBundleBuilder(MachineBasicBlock &BB,
425 MachineBasicBlock::iterator B,
426 MachineBasicBlock::iterator E)
427 : MBB(BB), Begin(B.getInstrIterator()), End(E.getInstrIterator()) {
428 assert(B != E && "No instructions to bundle");
429 ++B;
430 while (B != E) {
431 MachineInstr *MI = B;
432 ++B;
433 MI->bundleWithPred();
434 }
435 }
436
437 /// Create an MIBundleBuilder representing an existing instruction or bundle
438 /// that has MI as its head.
MIBundleBuilder(MachineInstr * MI)439 explicit MIBundleBuilder(MachineInstr *MI)
440 : MBB(*MI->getParent()), Begin(MI), End(getBundleEnd(MI)) {}
441
442 /// Return a reference to the basic block containing this bundle.
getMBB()443 MachineBasicBlock &getMBB() const { return MBB; }
444
445 /// Return true if no instructions have been inserted in this bundle yet.
446 /// Empty bundles aren't representable in a MachineBasicBlock.
empty()447 bool empty() const { return Begin == End; }
448
449 /// Return an iterator to the first bundled instruction.
begin()450 MachineBasicBlock::instr_iterator begin() const { return Begin; }
451
452 /// Return an iterator beyond the last bundled instruction.
end()453 MachineBasicBlock::instr_iterator end() const { return End; }
454
455 /// Insert MI into this bundle before I which must point to an instruction in
456 /// the bundle, or end().
insert(MachineBasicBlock::instr_iterator I,MachineInstr * MI)457 MIBundleBuilder &insert(MachineBasicBlock::instr_iterator I,
458 MachineInstr *MI) {
459 MBB.insert(I, MI);
460 if (I == Begin) {
461 if (!empty())
462 MI->bundleWithSucc();
463 Begin = MI;
464 return *this;
465 }
466 if (I == End) {
467 MI->bundleWithPred();
468 return *this;
469 }
470 // MI was inserted in the middle of the bundle, so its neighbors' flags are
471 // already fine. Update MI's bundle flags manually.
472 MI->setFlag(MachineInstr::BundledPred);
473 MI->setFlag(MachineInstr::BundledSucc);
474 return *this;
475 }
476
477 /// Insert MI into MBB by prepending it to the instructions in the bundle.
478 /// MI will become the first instruction in the bundle.
prepend(MachineInstr * MI)479 MIBundleBuilder &prepend(MachineInstr *MI) {
480 return insert(begin(), MI);
481 }
482
483 /// Insert MI into MBB by appending it to the instructions in the bundle.
484 /// MI will become the last instruction in the bundle.
append(MachineInstr * MI)485 MIBundleBuilder &append(MachineInstr *MI) {
486 return insert(end(), MI);
487 }
488 };
489
490 } // End llvm namespace
491
492 #endif
493