1 /* Low level interface to valgrind, for the remote server for GDB integrated
2 in valgrind.
3 Copyright (C) 2011
4 Free Software Foundation, Inc.
5
6 This file is part of VALGRIND.
7 It has been inspired from a file from gdbserver in gdb 6.6.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 51 Franklin Street, Fifth Floor,
22 Boston, MA 02110-1301, USA. */
23
24 #include "server.h"
25 #include "target.h"
26 #include "regdef.h"
27 #include "regcache.h"
28
29 #include "pub_core_aspacemgr.h"
30 #include "pub_tool_machine.h"
31 #include "pub_core_threadstate.h"
32 #include "pub_core_transtab.h"
33 #include "pub_core_gdbserver.h"
34 #include "pub_core_debuginfo.h"
35
36 #include "valgrind_low.h"
37
38 #include "libvex_guest_arm.h"
39
40 static struct reg regs[] = {
41 { "r0", 0, 32 },
42 { "r1", 32, 32 },
43 { "r2", 64, 32 },
44 { "r3", 96, 32 },
45 { "r4", 128, 32 },
46 { "r5", 160, 32 },
47 { "r6", 192, 32 },
48 { "r7", 224, 32 },
49 { "r8", 256, 32 },
50 { "r9", 288, 32 },
51 { "r10", 320, 32 },
52 { "r11", 352, 32 },
53 { "r12", 384, 32 },
54 { "sp", 416, 32 },
55 { "lr", 448, 32 },
56 { "pc", 480, 32 },
57 { "", 512, 0 }, // It seems these entries are needed
58 { "", 512, 0 }, // as previous versions of arm <-> gdb placed
59 { "", 512, 0 }, // some floating point registers here. So, cpsr
60 { "", 512, 0 }, // must be register 25.
61 { "", 512, 0 },
62 { "", 512, 0 },
63 { "", 512, 0 },
64 { "", 512, 0 },
65 { "", 512, 0 },
66 { "cpsr", 512, 32 },
67 { "d0", 544, 64 },
68 { "d1", 608, 64 },
69 { "d2", 672, 64 },
70 { "d3", 736, 64 },
71 { "d4", 800, 64 },
72 { "d5", 864, 64 },
73 { "d6", 928, 64 },
74 { "d7", 992, 64 },
75 { "d8", 1056, 64 },
76 { "d9", 1120, 64 },
77 { "d10", 1184, 64 },
78 { "d11", 1248, 64 },
79 { "d12", 1312, 64 },
80 { "d13", 1376, 64 },
81 { "d14", 1440, 64 },
82 { "d15", 1504, 64 },
83 { "d16", 1568, 64 },
84 { "d17", 1632, 64 },
85 { "d18", 1696, 64 },
86 { "d19", 1760, 64 },
87 { "d20", 1824, 64 },
88 { "d21", 1888, 64 },
89 { "d22", 1952, 64 },
90 { "d23", 2016, 64 },
91 { "d24", 2080, 64 },
92 { "d25", 2144, 64 },
93 { "d26", 2208, 64 },
94 { "d27", 2272, 64 },
95 { "d28", 2336, 64 },
96 { "d29", 2400, 64 },
97 { "d30", 2464, 64 },
98 { "d31", 2528, 64 },
99 { "fpscr", 2592, 32 }
100 };
101 static const char *expedite_regs[] = { "r11", "sp", "pc", 0 };
102 #define num_regs (sizeof (regs) / sizeof (regs[0]))
103
104 static
get_pc(void)105 CORE_ADDR get_pc (void)
106 {
107 unsigned long pc;
108
109 collect_register_by_name ("pc", &pc);
110
111 dlog(1, "stop pc is %p\n", (void *) pc);
112 return pc;
113 }
114
115 static
set_pc(CORE_ADDR newpc)116 void set_pc (CORE_ADDR newpc)
117 {
118 Bool mod;
119 supply_register_by_name ("pc", &newpc, &mod);
120 if (mod)
121 dlog(1, "set pc to %p\n", C2v (newpc));
122 else
123 dlog(1, "set pc not changed %p\n", C2v (newpc));
124 }
125
thumb_pc(Addr pc)126 Addr thumb_pc (Addr pc)
127 {
128 // If the thumb bit (bit 0) is already set, we trust it.
129 if (pc & 1) {
130 dlog (1, "%p = thumb (bit0 is set)\n", C2v (pc));
131 return pc;
132 }
133
134 // Here, bit 0 is not set.
135 // For a pc aligned on 4 bytes, we have to use the debug
136 // info to determine the thumb-ness.
137 // else (aligned on 2 bytes), we trust this is a thumb
138 // address and we set the thumb bit.
139
140 if (pc & 2) {
141 dlog (1, "bit0 not set, bit1 set => %p = thumb\n", C2v (pc));
142 return pc | 1;
143 }
144
145 // pc aligned on 4 bytes. We need to use debug info.
146 {
147 Char fnname[200]; // ??? max size
148 Addr entrypoint;
149 Addr ptoc; // unused but needed.
150 // If this is a thumb instruction, we need to ask
151 // the debug info with the bit0 set
152 // (why can't debug info do that for us ???)
153 // (why if this is a 4 bytes thumb instruction ???)
154 if (VG_(get_fnname_raw) (pc | 1, fnname, 200)) {
155 if (VG_(lookup_symbol_SLOW)( "*", fnname, &entrypoint, &ptoc )) {
156 dlog (1, "fnname %s lookupsym %p => %p %s.\n",
157 fnname, C2v(entrypoint), C2v(pc),
158 (entrypoint & 1 ? "thumb" : "arm"));
159 if (entrypoint & 1)
160 return pc | 1;
161 else
162 return pc;
163
164 } else {
165 dlog (1, "%p fnname %s lookupsym failed?. Assume arm\n",
166 C2v (pc), fnname);
167 return pc;
168 }
169 } else {
170 // Can't find function name. We assume this is arm
171 dlog (1, "%p unknown fnname?. Assume arm\n", C2v (pc));
172 return pc;
173 }
174 }
175 }
176
177 /* store registers in the guest state (gdbserver_to_valgrind)
178 or fetch register from the guest state (valgrind_to_gdbserver). */
179 static
transfer_register(ThreadId tid,int abs_regno,void * buf,transfer_direction dir,int size,Bool * mod)180 void transfer_register (ThreadId tid, int abs_regno, void * buf,
181 transfer_direction dir, int size, Bool *mod)
182 {
183 ThreadState* tst = VG_(get_ThreadState)(tid);
184 int set = abs_regno / num_regs;
185 int regno = abs_regno % num_regs;
186 *mod = False;
187
188 VexGuestARMState* arm = (VexGuestARMState*) get_arch (set, tst);
189
190 switch (regno) {
191 // numbers here have to match the order of regs above
192 // Attention: gdb order does not match valgrind order.
193 case 0: VG_(transfer) (&arm->guest_R0, buf, dir, size, mod); break;
194 case 1: VG_(transfer) (&arm->guest_R1, buf, dir, size, mod); break;
195 case 2: VG_(transfer) (&arm->guest_R2, buf, dir, size, mod); break;
196 case 3: VG_(transfer) (&arm->guest_R3, buf, dir, size, mod); break;
197 case 4: VG_(transfer) (&arm->guest_R4, buf, dir, size, mod); break;
198 case 5: VG_(transfer) (&arm->guest_R5, buf, dir, size, mod); break;
199 case 6: VG_(transfer) (&arm->guest_R6, buf, dir, size, mod); break;
200 case 7: VG_(transfer) (&arm->guest_R7, buf, dir, size, mod); break;
201 case 8: VG_(transfer) (&arm->guest_R8, buf, dir, size, mod); break;
202 case 9: VG_(transfer) (&arm->guest_R9, buf, dir, size, mod); break;
203 case 10: VG_(transfer) (&arm->guest_R10, buf, dir, size, mod); break;
204 case 11: VG_(transfer) (&arm->guest_R11, buf, dir, size, mod); break;
205 case 12: VG_(transfer) (&arm->guest_R12, buf, dir, size, mod); break;
206 case 13: VG_(transfer) (&arm->guest_R13, buf, dir, size, mod); break;
207 case 14: VG_(transfer) (&arm->guest_R14, buf, dir, size, mod); break;
208 case 15: {
209 VG_(transfer) (&arm->guest_R15T, buf, dir, size, mod);
210 if (dir == gdbserver_to_valgrind && *mod) {
211 // If gdb is changing the PC, we have to set the thumb bit
212 // if needed.
213 arm->guest_R15T = thumb_pc(arm->guest_R15T);
214 }
215 break;
216 }
217 case 16:
218 case 17:
219 case 18:
220 case 19:
221 case 20: /* 9 "empty registers". See struct reg regs above. */
222 case 21:
223 case 22:
224 case 23:
225 case 24: *mod = False; break;
226 case 25: {
227 UInt cpsr = LibVEX_GuestARM_get_cpsr (arm);
228 if (dir == valgrind_to_gdbserver) {
229 VG_(transfer) (&cpsr, buf, dir, size, mod);
230 } else {
231 # if 0
232 UInt newcpsr;
233 VG_(transfer) (&newcpsr, buf, dir, size, mod);
234 *mod = newcpsr != cpsr;
235 // GDBTD ???? see FIXME in guest_arm_helpers.c
236 LibVEX_GuestARM_put_flags (newcpsr, arm);
237 # else
238 *mod = False;
239 # endif
240 }
241 break;
242 }
243 case 26: VG_(transfer) (&arm->guest_D0, buf, dir, size, mod); break;
244 case 27: VG_(transfer) (&arm->guest_D1, buf, dir, size, mod); break;
245 case 28: VG_(transfer) (&arm->guest_D2, buf, dir, size, mod); break;
246 case 29: VG_(transfer) (&arm->guest_D3, buf, dir, size, mod); break;
247 case 30: VG_(transfer) (&arm->guest_D4, buf, dir, size, mod); break;
248 case 31: VG_(transfer) (&arm->guest_D5, buf, dir, size, mod); break;
249 case 32: VG_(transfer) (&arm->guest_D6, buf, dir, size, mod); break;
250 case 33: VG_(transfer) (&arm->guest_D7, buf, dir, size, mod); break;
251 case 34: VG_(transfer) (&arm->guest_D8, buf, dir, size, mod); break;
252 case 35: VG_(transfer) (&arm->guest_D9, buf, dir, size, mod); break;
253 case 36: VG_(transfer) (&arm->guest_D10, buf, dir, size, mod); break;
254 case 37: VG_(transfer) (&arm->guest_D11, buf, dir, size, mod); break;
255 case 38: VG_(transfer) (&arm->guest_D12, buf, dir, size, mod); break;
256 case 39: VG_(transfer) (&arm->guest_D13, buf, dir, size, mod); break;
257 case 40: VG_(transfer) (&arm->guest_D14, buf, dir, size, mod); break;
258 case 41: VG_(transfer) (&arm->guest_D15, buf, dir, size, mod); break;
259 case 42: VG_(transfer) (&arm->guest_D16, buf, dir, size, mod); break;
260 case 43: VG_(transfer) (&arm->guest_D17, buf, dir, size, mod); break;
261 case 44: VG_(transfer) (&arm->guest_D18, buf, dir, size, mod); break;
262 case 45: VG_(transfer) (&arm->guest_D19, buf, dir, size, mod); break;
263 case 46: VG_(transfer) (&arm->guest_D20, buf, dir, size, mod); break;
264 case 47: VG_(transfer) (&arm->guest_D21, buf, dir, size, mod); break;
265 case 48: VG_(transfer) (&arm->guest_D22, buf, dir, size, mod); break;
266 case 49: VG_(transfer) (&arm->guest_D23, buf, dir, size, mod); break;
267 case 50: VG_(transfer) (&arm->guest_D24, buf, dir, size, mod); break;
268 case 51: VG_(transfer) (&arm->guest_D25, buf, dir, size, mod); break;
269 case 52: VG_(transfer) (&arm->guest_D26, buf, dir, size, mod); break;
270 case 53: VG_(transfer) (&arm->guest_D27, buf, dir, size, mod); break;
271 case 54: VG_(transfer) (&arm->guest_D28, buf, dir, size, mod); break;
272 case 55: VG_(transfer) (&arm->guest_D29, buf, dir, size, mod); break;
273 case 56: VG_(transfer) (&arm->guest_D30, buf, dir, size, mod); break;
274 case 57: VG_(transfer) (&arm->guest_D31, buf, dir, size, mod); break;
275 case 58: VG_(transfer) (&arm->guest_FPSCR, buf, dir, size, mod); break;
276 default: vg_assert(0);
277 }
278 }
279
280 static
target_xml(Bool shadow_mode)281 char* target_xml (Bool shadow_mode)
282 {
283 if (shadow_mode) {
284 return "arm-with-vfpv3-valgrind.xml";
285 } else {
286 return "arm-with-vfpv3.xml";
287 }
288 }
289
290 static struct valgrind_target_ops low_target = {
291 num_regs,
292 regs,
293 13, //SP
294 transfer_register,
295 get_pc,
296 set_pc,
297 "arm",
298 target_xml
299 };
300
arm_init_architecture(struct valgrind_target_ops * target)301 void arm_init_architecture (struct valgrind_target_ops *target)
302 {
303 *target = low_target;
304 set_register_cache (regs, num_regs);
305 gdbserver_expedite_regs = expedite_regs;
306 }
307