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Searched refs:k22s (Results 1 – 5 of 5) sorted by relevance

/art/runtime/
Ddex_instruction.cc99 case k22s: return true; in HasVRegB()
119 case k22s: return true; in HasVRegA()
148 case k22s: return VRegB_22s(); in VRegB()
170 case k22s: return VRegA_22s(); in VRegA()
263 case k22s: // op vA, vB, #+CCCC in Decode()
463 …case k22s: os << StringPrintf("%s v%d, v%d, #%+d", opcode, VRegA_22s(), VRegB_22s(), VRegC_22s())… in DumpString()
Ddex_instruction-inl.h88 DCHECK_EQ(FormatOf(Opcode()), k22s); in VRegA_22s()
191 DCHECK_EQ(FormatOf(Opcode()), k22s); in VRegB_22s()
260 DCHECK_EQ(FormatOf(Opcode()), k22s); in VRegC_22s()
Ddex_instruction_list.h229 V(0xD0, ADD_INT_LIT16, "add-int/lit16", k22s, true, kNone, kContinue, kVerifyRegA | kVerifyRegB) \
230 V(0xD1, RSUB_INT, "rsub-int", k22s, true, kNone, kContinue, kVerifyRegA | kVerifyRegB) \
231 V(0xD2, MUL_INT_LIT16, "mul-int/lit16", k22s, true, kNone, kContinue, kVerifyRegA | kVerifyRegB) \
232 …V(0xD3, DIV_INT_LIT16, "div-int/lit16", k22s, true, kNone, kContinue | kThrow, kVerifyRegA | kVeri…
233 …V(0xD4, REM_INT_LIT16, "rem-int/lit16", k22s, true, kNone, kContinue | kThrow, kVerifyRegA | kVeri…
234 V(0xD5, AND_INT_LIT16, "and-int/lit16", k22s, true, kNone, kContinue, kVerifyRegA | kVerifyRegB) \
235 V(0xD6, OR_INT_LIT16, "or-int/lit16", k22s, true, kNone, kContinue, kVerifyRegA | kVerifyRegB) \
236 V(0xD7, XOR_INT_LIT16, "xor-int/lit16", k22s, true, kNone, kContinue, kVerifyRegA | kVerifyRegB) \
293 V(k22s) \
Ddex_instruction.h108 k22s, // op vA, vB, #+CCCC enumerator
/art/compiler/dex/
Dmir_graph.cc991 case Instruction::k22s: // Add one immediate from vC in GetDalvikDisassembly()