Home
last modified time | relevance | path

Searched refs:OpndSize_8 (Results 1 – 14 of 14) sorted by relevance

/dalvik/vm/compiler/codegen/x86/libenc/
Denc_prvt.h138 #define AL {OpndKind_GPReg, OpndSize_8, OpndExt_Any, RegName_AL}
139 #define AH {OpndKind_GPReg, OpndSize_8, OpndExt_Any, RegName_AH}
146 #define CL {OpndKind_GPReg, OpndSize_8, OpndExt_Any, RegName_CL}
168 #define r8 {OpndKind_GPReg, OpndSize_8, OpndExt_Any, RegName_Null}
175 #define r_m8 {(OpndKind)(OpndKind_GPReg|OpndKind_Mem), OpndSize_8, OpndExt_Any, RegName_Null}
179 #define r_m8s {(OpndKind)(OpndKind_GPReg|OpndKind_Mem), OpndSize_8, OpndExt_Signed, RegName_…
183 #define r_m8u {(OpndKind)(OpndKind_GPReg|OpndKind_Mem), OpndSize_8, OpndExt_Zero, RegName_Nu…
190 #define m8 {OpndKind_Mem, OpndSize_8, OpndExt_Any, RegName_Null}
198 #define imm8 {OpndKind_Imm, OpndSize_8, OpndExt_Any, RegName_Null}
202 #define imm8s {OpndKind_Imm, OpndSize_8, OpndExt_Signed, RegName_Null}
[all …]
Denc_defs.h227 RegName_AL=REGNAME(OpndKind_GPReg,OpndSize_8,0),
228 RegName_CL=REGNAME(OpndKind_GPReg,OpndSize_8,1),
229 RegName_DL=REGNAME(OpndKind_GPReg,OpndSize_8,2),
230 RegName_BL=REGNAME(OpndKind_GPReg,OpndSize_8,3),
234 RegName_AH=REGNAME(OpndKind_GPReg,OpndSize_8,4),
236 RegName_CH=REGNAME(OpndKind_GPReg,OpndSize_8,5),
237 RegName_DH=REGNAME(OpndKind_GPReg,OpndSize_8,6),
238 RegName_BH=REGNAME(OpndKind_GPReg,OpndSize_8,7),
240 RegName_SPL=REGNAME(OpndKind_GPReg,OpndSize_8,4),
241 RegName_BPL=REGNAME(OpndKind_GPReg,OpndSize_8,5),
[all …]
Dencoder.cpp120 OpndSize_8, OpndSize_16, OpndSize_32, OpndSize_64, OpndSize_Any
Denc_wrapper.cpp231 add_r(args, reg, OpndSize_8); in encoder_reg_reg()
351 add_imm(args, OpndSize_8, imm, true/*is_signed*/); in encoder_imm_reg()
382 size = OpndSize_8; in encoder_imm_mem()
Denc_defs_ext.h41 OpndSize_8 = 0x01, enumerator
Denc_base.h367 m_kind(OpndKind_Imm), m_size(OpndSize_8), m_ext(ext), m_imm64(ival) in m_kind()
Ddec_base.cpp252 opnd_size = OpndSize_8; in decode_aux()
Denc_base.cpp880 { "Sz8", OpndSize_8 },
Denc_tabl.cpp1882 if (sz==OpndSize_8) {imm_encode = ib; coff_encode=cb; } in buildMnemonicDesc()
/dalvik/vm/compiler/codegen/x86/
DLowerGetPut.cpp79 … movez_mem_disp_scale_to_reg(OpndSize_8, 1, false, offArrayObject_contents, 2, false, 1, 4, false); in aget_common_nohelper()
82 … moves_mem_disp_scale_to_reg(OpndSize_8, 1, false, offArrayObject_contents, 2, false, 1, 4, false); in aget_common_nohelper()
230 … move_reg_to_mem_disp_scale(OpndSize_8, 4, false, 1, false, offArrayObject_contents, 2, false, 1); in aput_common_nohelper()
424 …move_reg_to_mem_disp_scale(OpndSize_8, scratchReg, isPhysical, scratchReg, isPhysical, 0, tgtAddrR… in markCard()
432 …move_reg_to_mem_disp_scale(OpndSize_8, scratchReg, isPhysical, scratchReg, isPhysical, 0, tgtAddrR… in markCard_notNull()
439 …move_reg_to_mem_disp_scale(OpndSize_8, scratchReg, isScratchPhysical, scratchReg, isScratchPhysica… in markCard_filled()
DLowerJump.cpp85 if(immSize == OpndSize_8) { //-128 to 127 in updateJumpInst()
418 if(target-MIN_JCC_SIZE < 128 && target-MAX_JCC_SIZE >= -128) return OpndSize_8; in estOpndSizeFromImm()
430 if(size == OpndSize_8) return 2; in getJmpCallInstSize()
435 if(size == OpndSize_8) return 2; in getJmpCallInstSize()
444 assert(size != OpndSize_8); in getJmpCallInstSize()
486 *immSize = OpndSize_8; in getRelativeOffset()
DLowerObject.cpp463 movez_mem_to_reg(OpndSize_8, 1, 5, false, 6, false); in common_filled_new_array()
DCodegenInterface.cpp897 callsiteInfo->misPredBranchOver = (LIR*)conditional_jump_int(Condition_NE, 0, OpndSize_8); in genValidationForPredictedInline()
DLowerInvoke.cpp71 updateJumpInst(streamMisPred, OpndSize_8, relativeNCG); in genLandingPadForMispredictedCallee()