| /dalvik/vm/compiler/codegen/arm/ |
| D | ArchFactory.cpp | 74 int reg1, int reg2, int dOffset, in genRegRegCheck() argument
78 res = opRegReg(cUnit, kOpCmp, reg1, reg2); in genRegRegCheck()
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| /dalvik/vm/compiler/codegen/x86/ |
| D | LowerHelper.cpp | 322 int reg, int reg2, LowOpndRegType type) { in lower_reg_reg() argument
325 reg-reg2, size==OpndSize_64, stream); in lower_reg_reg()
328 stream = encoder_reg_reg(m, size, reg, true, reg2, true, type, stream); in lower_reg_reg()
338 int reg2, bool isPhysical2, LowOpndRegType type) { in dump_reg_reg_noalloc() argument
339 return lower_reg_reg(m, ATOM_NORMAL, size, reg, reg2, type); in dump_reg_reg_noalloc()
352 int reg2, bool isPhysical2, LowOpndRegType type) { in dump_reg_reg_noalloc_dst() argument
356 if(isMnemonicMove(m) && regAll == reg2) return NULL; in dump_reg_reg_noalloc_dst()
357 return lower_reg_reg(m, ATOM_NORMAL, size, regAll, reg2, type); in dump_reg_reg_noalloc_dst()
359 stream = encoder_reg_reg(m, size, reg, isPhysical, reg2, isPhysical2, type, stream); in dump_reg_reg_noalloc_dst()
368 int reg2, bool isPhysical2, LowOpndRegType type) { in dump_reg_reg_noalloc_src() argument
[all …]
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| D | Lower.h | 646 int reg2, bool isPhysical2);
648 int reg2, bool isPhysical2);
652 int reg2, bool isPhysical2);
656 int reg2, bool isPhysical2);
701 int reg2, bool isPhysical2);
708 int reg2, bool isPhysical2);
710 int reg2, bool isPhysical2);
727 int reg2, bool isPhysical2);
741 int reg2, bool isPhysical2);
744 int reg2, bool isPhysical2);
[all …]
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| /dalvik/vm/compiler/codegen/x86/libenc/ |
| D | enc_wrapper.h | 186 int reg2, bool isPhysical2, LowOpndRegType type, char* stream);
230 int reg, bool isPhysical, int reg2,
233 int reg, bool isPhysical, int reg2,
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| D | enc_wrapper.cpp | 226 int reg2, bool isPhysical2, LowOpndRegType type, char * stream) { in encoder_reg_reg() argument
227 if((m == Mnemonic_MOV || m == Mnemonic_MOVQ) && reg == reg2) return stream; in encoder_reg_reg()
229 add_r(args, reg2, size); //destination in encoder_reg_reg()
476 int reg, bool isPhysical, int reg2, in encoder_movez_reg_to_reg() argument
479 add_r(args, reg2, OpndSize_32); //destination in encoder_movez_reg_to_reg()
490 int reg, bool isPhysical,int reg2, in encoder_moves_reg_to_reg() argument
493 add_r(args, reg2, OpndSize_32); //destination in encoder_moves_reg_to_reg()
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| /dalvik/vm/compiler/codegen/mips/ |
| D | CodegenFactory.cpp | 284 int reg1, int reg2, int dOffset, in genRegRegCheck() argument
290 res = newLIR3(cUnit, kMipsSlt, tReg, reg1, reg2); in genRegRegCheck()
295 res = newLIR3(cUnit, kMipsSltu, tReg, reg1, reg2); in genRegRegCheck()
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| D | RallocUtil.cpp | 107 static void flushRegWide(CompilationUnit *cUnit, int reg1, int reg2) in flushRegWide() argument
110 RegisterInfo *info2 = getRegInfo(cUnit, reg2); in flushRegWide()
1017 int reg1, int reg2) in dvmCompilerFlushRegWideForV5TEVFP() argument
1019 flushRegWide(cUnit, reg1, reg2); in dvmCompilerFlushRegWideForV5TEVFP()
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| D | CodegenDriver.cpp | 2681 int reg2 = rlSrc2.lowReg; in handleFmt22t() local
2694 test = newLIR3(cUnit, kMipsSlt, tReg, reg1, reg2); in handleFmt22t()
2696 reg2 = r_ZERO; in handleFmt22t()
2701 test = newLIR3(cUnit, kMipsSlt, tReg, reg2, reg1); in handleFmt22t()
2703 reg2 = -1; in handleFmt22t()
2708 test = newLIR3(cUnit, kMipsSlt, tReg, reg2, reg1); in handleFmt22t()
2710 reg2 = r_ZERO; in handleFmt22t()
2715 test = newLIR3(cUnit, kMipsSlt, tReg, reg1, reg2); in handleFmt22t()
2717 reg2 = -1; in handleFmt22t()
2725 genConditionalBranchMips(cUnit, opc, reg1, reg2, &labelList[bb->taken->id]); in handleFmt22t()
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| /dalvik/vm/compiler/codegen/ |
| D | Ralloc.h | 202 extern void dvmCompilerFlushRegWide(CompilationUnit *cUnit, int reg1, int reg2);
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| D | RallocUtil.cpp | 105 void dvmCompilerFlushRegWide(CompilationUnit *cUnit, int reg1, int reg2) in dvmCompilerFlushRegWide() argument
108 RegisterInfo *info2 = getRegInfo(cUnit, reg2); in dvmCompilerFlushRegWide()
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| /dalvik/vm/compiler/codegen/mips/FP/ |
| D | MipsFP.cpp | 23 int reg1, int reg2);
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| /dalvik/vm/compiler/codegen/arm/Thumb/ |
| D | Factory.cpp | 36 int reg1, int reg2, int dOffset,
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| /dalvik/vm/compiler/codegen/mips/Mips32/ |
| D | Factory.cpp | 41 int reg1, int reg2, int dOffset,
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| /dalvik/vm/analysis/ |
| D | CodeVerify.cpp | 2084 static bool upcastBooleanOp(RegisterLine* registerLine, u4 reg1, u4 reg2) in upcastBooleanOp() argument
2089 type2 = getRegisterType(registerLine, reg2); in upcastBooleanOp()
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